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SN74ALVCH16543DGGR PDF预览

SN74ALVCH16543DGGR

更新时间： 2024-09-15 13:00:19
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
11页 167K
描述
16-Bit Registered Transceiver With 3-State Outputs 56-TSSOP -40 to 85

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SN74ALVCH16543DGGR 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：TSSOP
包装说明：GREEN, PLASTIC, TSSOP-56针数：56
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.02Is Samacsys：N
其他特性：INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION控制类型：INDEPENDENT CONTROL
计数方向：BIDIRECTIONAL系列：ALVC/VCX/A
JESD-30 代码：R-PDSO-G56JESD-609代码：e4
长度：14 mm负载电容（CL）：50 pF
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER最大I（ol）：0.024 A
湿度敏感等级：1位数：8
功能数量：2端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP56,.3,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TR峰值回流温度（摄氏度）：260
电源：3.3 V最大电源电流（ICC）：0.04 mA
Prop。Delay @ Nom-Sup：4.3 ns传播延迟（tpd）：5.1 ns
认证状态：Not Qualified施密特触发器：No
座面最大高度：1.2 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
宽度：6.1 mmBase Number Matches：1

SN74ALVCH16543DGGR 数据手册

 浏览型号SN74ALVCH16543DGGR的Datasheet PDF文件第2页浏览型号SN74ALVCH16543DGGR的Datasheet PDF文件第3页浏览型号SN74ALVCH16543DGGR的Datasheet PDF文件第4页浏览型号SN74ALVCH16543DGGR的Datasheet PDF文件第5页浏览型号SN74ALVCH16543DGGR的Datasheet PDF文件第6页浏览型号SN74ALVCH16543DGGR的Datasheet PDF文件第7页 
SN74ALVCH16543  
16-BIT REGISTERED TRANSCEIVER  
WITH 3-STATE OUTPUTS  
SCES025D – JULY 1995 – REVISED FEBRUARY 1999  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1OEAB  
1LEAB  
1CEAB  
GND  
1OEBA  
1LEBA  
1CEBA  
GND  
1B1  
1B2  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
2
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
3
4
1A1  
1A2  
5
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
6
V
V
7
CC  
CC  
1A3  
1A4  
1A5  
GND  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
1B3  
1B4  
1B5  
GND  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
8
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
description  
This 16-bit registered transceiver is designed for  
1.65-V to 3.6-V V operation.  
CC  
The SN74ALVCH16543 can be used as two 8-bit  
transceivers or one 16-bit transceiver. Separate  
latch-enable (LEAB or LEBA) and output-enable  
(OEAB or OEBA) inputs are provided for each  
register to permit independent control in either  
direction of data flow.  
V
V
CC  
CC  
2A7  
2A8  
GND  
2CEAB  
2LEAB  
2OEAB  
2B7  
2B8  
GND  
2CEBA  
2LEBA  
2OEBA  
The A-to-B enable (CEAB) input must be low to  
enter data from A or to output data from B. If CEAB  
is low and LEAB is low, the A-to-B latches are  
transparent; a subsequent low-to-high transition  
of LEAB puts the A latches in the storage mode.  
With CEAB and OEAB both low, the 3-state  
B outputs are active and reflect the data present  
at the output of the A latches. Data flow from B to  
A is similar, but requires using CEBA, LEBA, and  
OEBA.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVCH16543 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

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SN74ALVCH16543DGGR 替代型号

型号 品牌 替代类型 描述 数据表
74ALVCH16543DGGRG4 TI

完全替代

 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
74ALVCH16543DGGRE4 TI

完全替代

 16-Bit Registered Transceiver With 3-State Outputs 56-TSSOP -40 to 85

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