5秒后页面跳转
SN74ALVC16245DLR PDF预览

SN74ALVC16245DLR

更新时间: 2024-09-15 17:38:31
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路
页数 文件大小 规格书
7页 123K
描述
16-Bit Bus Transceiver With 3-State Outputs 48-SSOP -40 to 85

SN74ALVC16245DLR 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP, SSOP48,.4针数:48
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.3其他特性:WITH DIRECTION CONTROL
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G48
长度:15.875 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS TRANSCEIVER最大I(ol):0.024 A
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP48,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
传播延迟(tpd):5 ns认证状态:Not Qualified
座面最大高度:2.79 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A宽度:7.5 mm
Base Number Matches:1

SN74ALVC16245DLR 数据手册

 浏览型号SN74ALVC16245DLR的Datasheet PDF文件第2页浏览型号SN74ALVC16245DLR的Datasheet PDF文件第3页浏览型号SN74ALVC16245DLR的Datasheet PDF文件第4页浏览型号SN74ALVC16245DLR的Datasheet PDF文件第5页浏览型号SN74ALVC16245DLR的Datasheet PDF文件第6页浏览型号SN74ALVC16245DLR的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢈ ꢉꢊ ꢃꢋ  
ꢈ ꢉ ꢌꢍꢎ ꢏ ꢍꢐꢀ ꢏ ꢑꢄꢁ ꢀꢇ ꢒ ꢎꢆ ꢒ ꢑ  
ꢓ ꢎꢏ ꢔ ꢕ ꢌꢀꢏꢄꢏ ꢒ ꢖ ꢐꢏ ꢗ ꢐꢏꢀ  
SCAS419D − JANUARY 1993 − REVISED AUGUST 1995  
DGG OR DL PACKAGE  
(TOP VIEW)  
D EPIC(Enhanced-Performance Implanted  
CMOS) Submicron Process  
D Member of the Texas Instruments  
D ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
WidebusFamily  
2
3
4
5
(C = 200 pF, R = 0)  
6
D Latch-Up Performance Exceeds 250 mA  
7
V
V
CC  
CC  
Per JEDEC Standard JESD-17  
8
1B5  
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
D Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
D Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages  
description  
The SN74ALVC16245 16-bit (dual-octal)  
noninverting bus transceiver is designed for 2.3-V  
V
V
CC  
CC  
2B5  
2B6  
GND  
2B7  
2B8  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
to 3.6-V V  
and 3.3-V V  
operation; it is tested at 2.5-V, 2.7-V,  
CC  
.
CC  
The SN74ALVC16245 is designed for  
asynchronous communication between data  
buses. The control-function implementation  
minimizes external timing requirements.  
2DIR  
This device can be used as two 8-bit transceivers  
or one 16-bit transceiver. It allows data  
transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses  
are effectively isolated.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVC16245 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG)  
packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the  
same printed-circuit-board area.  
The SN74ALVC16245 is characterized for operation from 40°C to 85°C.  
FUNCTION TABLE  
(each 8-bit section)  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
ꢏꢤ  
Copyright 1995, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
ꢢꢤ  
ꢟꢝ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

与SN74ALVC16245DLR相关器件

型号 品牌 获取价格 描述 数据表
SN74ALVC16260 TI

获取价格

12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74ALVC162601 TI

获取价格

18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVC162601DGG TI

获取价格

ALVC/VCX/A SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
SN74ALVC162601DGGR TI

获取价格

暂无描述
SN74ALVC162601DL TI

获取价格

18-Bit Universal Bus Transceiver With 3-State Outputs 56-SSOP -40 to 85
SN74ALVC162601DLR TI

获取价格

18-Bit Universal Bus Transceiver With 3-State Outputs 56-SSOP -40 to 85
SN74ALVC16260DGG TI

获取价格

ALVC/VCX/A SERIES, 12 MULTIPLEXER AND DEMUX/DECODER, PDSO56, TSSOP-56
SN74ALVC16260DGGR ETC

获取价格

Bus Exchanger
SN74ALVC16260DL TI

获取价格

12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS
SN74ALVC16260DLR TI

获取价格

暂无描述