SN54LVT574FK

更新时间： 2024-09-12 23:03:07

品牌	Logo	应用领域
德州仪器 - TI		触发器输出元件
页数	文件大小	规格书
15页	468K
描述
3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

SN54LVT574FK 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QLCC	包装说明：	QCCN, LCC20,.35SQ
针数：	20	Reach Compliance Code：	not_compliant
ECCN代码：	3A001.A.2.C	HTS代码：	8542.39.00.01
风险等级：	5.56	其他特性：	BROADSIDE VERSION OF 374
系列：	LVT	JESD-30 代码：	S-CQCC-N20
长度：	8.89 mm	负载电容（CL）：	50 pF
逻辑集成电路类型：	BUS DRIVER	最大频率@ Nom-Sup：	150000000 Hz
最大I（ol）：	0.048 A	位数：	8
功能数量：	1	端口数量：	2
端子数量：	20	最高工作温度：	125 °C
最低工作温度：	-55 °C	输出特性：	3-STATE
输出极性：	TRUE	封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	QCCN	封装等效代码：	LCC20,.35SQ
封装形状：	SQUARE	封装形式：	CHIP CARRIER
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	3.3 V
最大电源电流（ICC）：	14 mA	Prop。Delay @ Nom-Sup：	6.1 ns
传播延迟（tpd）：	6.8 ns	认证状态：	Not Qualified
座面最大高度：	2.03 mm	子类别：	FF/Latches
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	2.7 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	BICMOS	温度等级：	MILITARY
端子形式：	NO LEAD	端子节距：	1.27 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
触发器类型：	POSITIVE EDGE	宽度：	8.89 mm
Base Number Matches：	1

SN54LVT574FK 数据手册

SN54LVT574, SN74LVT574

3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCBS139D – MAY 1992 – REVISED JULY 1995

SN54LVT574 . . . J OR W PACKAGE

SN74LVT574 . . . DB, DW, OR PW PACKAGE

(TOP VIEW)

State-of-the-Art Advanced BiCMOS

Technology (ABT) Design for 3.3-V

Operation and Low Static Power

Dissipation

Support Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 3.3-V V

)

Support Unregulated Battery Operation

Down to 2.7 V

Typical V

< 0.8 V at V

(Output Ground Bounce)

OLP

= 3.3 V, T = 25°C

13 7Q

12 8Q

ESD Protection Exceeds 2000 V Per

MIL-STD-883C, Method 3015; Exceeds

200 V Using Machine Model

(C = 200 pF, R = 0)

GND

CLK

SN54LVT574 . . . FK PACKAGE

(TOP VIEW)

Latch-Up Performance Exceeds 500 mA

Per JEDEC Standard JESD-17

Bus-Hold Data Inputs Eliminate the Need

for External Pullup Resistors

Support Live Insertion

20 19

Package Options Include Plastic

Small-Outline (DW), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK),

Ceramic Flat (W) Packages, and Ceramic

(J) DIPs

9 10 11 12 13

description

These octal flip-flops are designed specifically for low-voltage (3.3-V) V

provide a TTL interface to a 5-V system environment.

operation, but with the capability to

The eight flip-flops of the ′LVT574 are edge-triggered D-type flip-flops. On the positive transition of the clock

(CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high

or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive

the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus

lines without need for interface or pullup components. OE does not affect the internal operations of the flip-flops.

Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74LVT574 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count

and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54LVT574 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74LVT574 is characterized for operation from –40°C to 85°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...15

中文翻译

下载PDF

与SN54LVT574FK相关器件

型号	品牌	获取价格	描述	数据表
SN54LVT574J	TI	获取价格	3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54LVT574W	TI	获取价格	3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54LVT639J	TI	获取价格	LVT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, CDIP20
SN54LVT646	TI	获取价格	3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54LVT646_14	TI	获取价格	3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54LVT646FK	TI	获取价格	3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54LVT646JT	TI	获取价格	3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54LVT646W	TI	获取价格	3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54LVT652	TI	获取价格	3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54LVT760FK	TI	获取价格	LVT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CQCC28

与SN54LVT574FK相关文章

SL74HC10N：高性能三输入与非门解析
2024-09-03

78
AIC1781A 电池充电控制器深度解析
2024-09-03

69
Pickering新高压舌簧继电器亮相汽车测试博览会
2024-08-26

100
采用MCU+MPU双处理器架构实现的创新应用设计探索
2024-08-23

114

产品中心

服务支持

精选活动

关于我们

帮助中心

SN54LVT574FK

SN54LVT574FK 技术参数

SN54LVT574FK 数据手册

与SN54LVT574FK相关器件

与SN54LVT574FK相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SN54LVT574FK

SN54LVT574FK 技术参数

SN54LVT574FK 数据手册

与SN54LVT574FK相关器件

与SN54LVT574FK相关文章

您还可以找

您在本页遇到什么问题？