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SN54LVT8980_06 PDF预览

SN54LVT8980_06

更新时间: 2024-09-15 05:04:55
品牌 Logo 应用领域
德州仪器 - TI 总线控制器测试
页数 文件大小 规格书
37页 576K
描述
EMBEDDED TEST-BUS CONTROLLERS IEEE STD 1149.1 (JTAG) TAP MASTERS WITH 8-BIT GENERIC HOST INTERFACES

SN54LVT8980_06 数据手册

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ꢌꢍ ꢎꢌꢏ ꢏꢌꢏ ꢆ ꢌꢀꢆꢐꢎꢑꢀ ꢒꢓ ꢁꢆꢔ ꢓ ꢄꢄ ꢌꢔ  
ꢈꢗ  
SCBS676E − DECEMBER 1996 − REVISED MARCH 2004  
SN54LVT8980 . . . JT PACKAGE  
SN74LVT8980 . . . DW PACKAGE  
(TOP VIEW)  
D
Members of Texas Instruments (TI) Broad  
Family of Testability Products Supporting  
IEEE Std 1149.1-1990 (JTAG) Test Access  
Port (TAP) and Boundary-Scan Architecture  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
STRB  
R/W  
D0  
D1  
D2  
D3  
GND  
D4  
A0  
A1  
A2  
RDY  
TDO  
D
D
D
Provide Built-In Access to IEEE Std 1149.1  
Scan-Accessible Test/Maintenance  
Facilities at Board and System Levels  
2
3
4
5
While Powered at 3.3 V, the TAP Interface Is  
Fully 5-V Tolerant for Mastering Both 5-V  
and/or 3.3-V IEEE Std 1149.1 Targets  
6
V
CC  
7
TCK  
TMS  
TRST  
TDI  
RST  
TOE  
8
Simple Interface to Low-Cost 3.3-V  
Microprocessors/Microcontrollers Via 8-Bit  
Asynchronous Read/Write Data Bus  
9
D5  
D6  
D7  
10  
11  
12  
D
D
Easy Programming Via Scan-Level  
Command Set and Smart TAP Control  
CLKIN  
Transparently Generate Protocols to  
Support Multidrop TAP Configurations  
Using TI’s Addressable Scan Port  
SN54LVT8980 . . . FK PACKAGE  
(TOP VIEW)  
D
D
Flexible TCK Generator Provides  
Programmable Division, Gated-TCK, and  
Free-Running-TCK Modes  
4
3
2
1 28 27 26  
25  
Discrete TAP Control Mode Supports  
Arbitrary TMS/TDI Sequences for  
Noncompliant Targets  
D1  
D2  
D3  
NC  
RDY  
TDO  
5
6
24  
23  
22  
21  
20  
19  
V
7
CC  
D
D
D
D
Programmable 32-Bit Test Cycle Counter  
Allows Virtually Unlimited Scan/Test Length  
NC  
8
GND  
D4  
TCK  
TMS  
TRST  
9
10  
11  
Accommodate Target Retiming (Pipeline)  
Delays of Up To 15 TCK Cycles  
D5  
12 13 14 15 16 17 18  
Test Output Enable (TOE) Allows for  
External Control of TAP Signals  
High-Drive Outputs (−32-mA I , 64-mA I  
)
OH  
OL  
at TAP Support Backplane Interface and/or  
High Fanout  
NC − No internal connection  
D
Package Options Include Plastic  
Small-Outline (DW) Package, Ceramic Chip  
Carriers (FK), and Ceramic 300-mil DIPs (JT)  
description  
The ’LVT8980 embedded test-bus controllers (eTBC) are members of the TI broad family of testability integrated  
circuits. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of complex  
circuit assemblies. Unlike most other devices of this family, the eTBC is not a boundary-scannable device;  
rather, its function is to master an IEEE Std 1149.1 (JTAG) test access port (TAP) under the command of an  
embedded host microprocessor/microcontroller. Thus, the eTBC enables the practical and effective use of the  
IEEE Std 1149.1 test-access infrastructure to support embedded/built-in test, emulation, and  
configuration/maintenance facilities at board and system levels.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2004, Texas Instruments Incorporated  
ꢑ ꢁ ꢄꢌꢀꢀ ꢓ ꢆꢟ ꢌꢔꢞ ꢕꢀ ꢌ ꢁ ꢓꢆꢌꢏ ꢡꢢ ꢣꢤ ꢥꢦꢧ ꢨꢩꢪ ꢫꢡ ꢧꢦ ꢫꢡꢬ ꢣꢫꢤ ꢝꢔ ꢓ ꢏ ꢑ ꢒꢆ ꢕꢓ ꢁ  
ꢯꢬ ꢮ ꢬ ꢩ ꢪ ꢡ ꢪ ꢮ ꢤ ꢗ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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