Datasheet > SiDR140DP

SiDR140DP

更新时间： 2024-11-22 14:53:55

品牌	Logo	应用领域
威世 - VISHAY		/
页数	文件大小	规格书
9页	217K
描述
N-Channel 25 V (D-S) MOSFET

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SiDR140DP 数据手册

SiDR140DP

Vishay Siliconix

www.vishay.com

N-Channel 25 V (D-S) MOSFET

FEATURES

PowerPAK^®SO-8DC

• TrenchFET^®Gen IV power MOSFET

• Optimized Q_g, Q_gd, and Q_gd/Q_gsratio reduces

switching related power loss

• Top side cooling feature provides additional

venue for thermal transfer

• 100 % R_gand UIS tested

• Material categorization: for definitions of compliance

please see www.vishay.com/doc?99912

Top View

Bottom View

APPLICATIONS

PRODUCT SUMMARY

V_DS(V)

• Synchronous rectification

• High power density DC/DC

R_DS(on)max. () at V_GS= 10 V

0.00067

0.00090

52.8

R_DS(on)max. () at V_GS= 4.5 V

Q_gtyp. (nC)

• Synchronous buck converter

• OR-ing

I_D(A)

100 ^{a, g}

• Load switching

N-Channel MOSFET

Configuration

Single

• Battery management

ORDERING INFORMATION

Package

Lead (Pb)-free and halogen-free

PowerPAK SO-8DC

SiDR140DP-T1-GE3

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C, unless otherwise noted)

PARAMETER

SYMBOL

LIMIT

UNIT

Drain-source voltage

Gate-source voltage

V_DS

V_GS

+20 / -16

100 ^a

79 ^{b, c}

63 ^{b, c}

500

T_C= 25 °C

_C= 70 °C

T_A= 25 °C

T_A= 70 °C

Continuous drain current (T_J= 150 °C)

I_D

Pulsed drain current (t = 100 μs)

I_DM

I_S

T_C= 25 °C

T_A= 25 °C

100

5.6 ^{b, c}

Continuous source-drain diode current

Single pulse avalanche current

Single pulse avalanche energy

I_AS

E_AS

180

125

6.25 ^{b, c}

4 ^{b, c}

L = 0.1 mH

T_C= 25 °C

T_C= 70 °C

T_A= 25 °C

T_A= 70 °C

Maximum power dissipation

P_D

Operating junction and storage temperature range

Soldering recommendations (peak temperature) ^c

T_J, T_stg

-55 to +150

260

°C

THERMAL RESISTANCE RATINGS

PARAMETER

Maximum junction-to-ambient ^b

Maximum junction-to-case (drain)

Maximum junction-to-case (source)

SYMBOL

R_thJA

R_thJC

TYPICAL

MAXIMUM

UNIT

t  10 s

Steady state

0.8

°C/W

R_thJC

1.1

1.4

Notes

a. Package limited

b. Surface mounted on 1" x 1" FR4 board

c. t = 10 s

d. See solder profile (www.vishay.com/doc?73257). The PowerPAK SO-8DC is a leadless package. The end of the lead terminal is exposed

copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed

and is not required to ensure adequate bottom side solder interconnection

e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components

f. Maximum under steady state conditions is 54 °C/W

g. T_C= 25 °C

S17-1734-Rev. A, 27-Nov-17

Document Number: 76239

For technical questions, contact: pmostechsupport@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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与SiDR140DP相关器件

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