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SI5368B-C-GQ

更新时间： 2024-09-17 21:12:43
品牌 Logo 应用领域
芯科 - SILICON ATM异步传输模式电信电信集成电路
页数 文件大小 规格书
92页 1088K
描述
Support Circuit, 1-Func, PQFP100, 14 X 14 MM, ROHS COMPLIANT, MS-026AED-HD, TQFP-100

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SI5368B-C-GQ 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFP
包装说明：14 X 14 MM, ROHS COMPLIANT, MS-026AED-HD, TQFP-100针数：100
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：2.34应用程序：SONET;SDH
JESD-30 代码：S-PQFP-G100长度：14 mm
功能数量：1端子数量：100
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：HTFQFP
封装形状：SQUARE封装形式：FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：1.2 mm标称供电电压：3.3 V
表面贴装：YES电信集成电路类型：ATM/SONET/SDH SUPPORT CIRCUIT
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：14 mm
Base Number Matches：1

SI5368B-C-GQ 数据手册

 浏览型号SI5368B-C-GQ的Datasheet PDF文件第2页浏览型号SI5368B-C-GQ的Datasheet PDF文件第3页浏览型号SI5368B-C-GQ的Datasheet PDF文件第4页浏览型号SI5368B-C-GQ的Datasheet PDF文件第5页浏览型号SI5368B-C-GQ的Datasheet PDF文件第6页浏览型号SI5368B-C-GQ的Datasheet PDF文件第7页 
Si5368  
ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER  
ATTENUATOR  
Features  
Generates any frequency from  
2 kHz to 945 MHz and select  
frequencies to 1.4 GHz from an  
input frequency of 2 kHz to  
710 MHz  
Ultra-low jitter clock outputs with  
jitter generation as low as 300 fs  
rms (12 kHz–20 MHz)  
Integrated loop filter with selectable  
loop bandwidth (60 Hz to 8.4 kHz)  
Meets OC-192 GR-253-CORE jitter  
specifications  
Supports holdover and freerun  
modes of operation  
Five clock outputs with  
selectable signal format  
(LVPECL, LVDS, CML, CMOS)  
SONET frame sync switching  
and regeneration  
Support for ITU G.709 and  
custom FEC ratios (253/226,  
239/237, 255/238, 255/237,  
255/236)  
Ordering Information:  
LOL, LOS, FOS alarm outputs  
See page 79.  
Four clock inputs with manual or Digitally-controlled output phase  
automatically controlled hitless  
switching and phase build-out  
Small size: 14 x 14 mm 100-pin  
TQFP  
adjust  
I2C or SPI programmable  
settings  
Pb-free, RoHS compliant  
Pin Assignments  
Applications  
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76  
1
75  
NC  
NC  
NC  
NC  
SONET/SDH OC-48/STM-16/OC-Data converter clocking  
74  
73  
2
NC  
3
RST  
NC  
192/STM-64 line cards  
GbE/10GbE, 1/2/4/8/10/16G Fibre  
Channel  
ITU G.709 and custom FEC line  
cards  
OTN/WDM Muxponder, MSPP,  
ROADM line cards  
SONET/SDH + PDH clock  
synthesis  
Test and measurement  
Synchronous Ethernet  
Broadcast video  
NC  
4
72  
71  
70  
SDI  
VDD  
5
A2_SS  
VDD  
6
A1  
A0  
NC  
GND  
GND  
7
69  
68  
67  
8
C1B  
9
66  
65  
NC  
10  
11  
12  
13  
14  
15  
C2B  
C3B  
GND  
GND  
64  
63  
T_ALM  
0_C3A  
GND  
VDD  
Si5368  
62  
61  
VDD  
SDA_SDO  
VDD  
XA  
Wireless basestations  
60  
59  
SCL  
C2A  
C1A  
16  
17  
XB  
58  
57  
GND  
GND  
NC  
18  
19  
20  
21  
GND PAD  
CS1_C4A  
NC  
56  
55  
INC  
ALIGN  
NC  
DEC  
NC  
22  
23  
54  
53  
NC  
Description  
NC  
NC  
52  
51  
24  
25  
NC  
NC  
47  
42 43 44 45 46  
49 50  
48  
41  
40  
37 38 39  
36  
26 27 28 29 30 31 32 33 34 35  
The Si5368 is a jitter-attenuating precision clock multiplier for applications  
requiring sub 1 ps rms jitter performance. The Si5368 accepts four clock  
inputs ranging from 2 kHz to 710 MHz and generates five clock outputs  
ranging from 2 kHz to 945 MHz and select frequencies to 1.4 GHz. The  
device provides virtually any frequency translation combination across this  
operating range. The outputs are divided down separately from a common  
source. The Si5368 input clock frequency and clock multiplication ratio are  
programmable through an I2C or SPI interface. The Si5368 is based on  
Silicon Laboratories' third-generation DSPLL® technology, which provides  
any-frequency synthesis and jitter attenuation in a highly integrated PLL  
solution that eliminates the need for external VCXO and loop filter  
components. The DSPLL loop bandwidth is digitally programmable,  
providing jitter performance optimization at the application level. Operating  
from a single 1.8, 2.5 ,or 3.3 V supply, the Si5368 is ideal for providing  
clock multiplication and jitter attenuation in high performance timing  
applications.  
Rev. 1.0 8/12  
Copyright © 2012 by Silicon Laboratories  
Si5368  
1234567...92

中文翻译

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与SI5368B-C-GQ相关器件

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SI5368C-B-GQR SILICON

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 		Support Circuit, 1-Func, PQFP100, 14 X 14 MM, ROHS COMPLIANT, MS-026AED-HD, TQFP-100
SI5368C-C-GQ SILICON

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 		Support Circuit, 1-Func, PQFP100, 14 X 14 MM, ROHS COMPLIANT, MS-026AED-HD, TQFP-100
SI5368C-C-GQR SILICON

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 		Support Circuit, 1-Func, PQFP100, 14 X 14 MM, ROHS COMPLIANT, MS-026AED-HD, TQFP-100
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SI5369A-C-GQ SILICON

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 		Processor Specific Clock Generator, 1417MHz, CMOS, PQFP100, TQFP-100
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 		Processor Specific Clock Generator, 1417MHz, CMOS, PQFP100, TQFP-100
SI5369B-C-GQ SILICON

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 		Processor Specific Clock Generator, 808MHz, CMOS, PQFP100, TQFP-100
SI5369B-C-GQR SILICON

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 		Processor Specific Clock Generator, 808MHz, CMOS, PQFP100, TQFP-100
SI5369C-C-GQ SILICON

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 		Processor Specific Clock Generator, 346MHz, CMOS, PQFP100, TQFP-100

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