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SI5374B-A-GL PDF预览

SI5374B-A-GL

更新时间: 2024-09-17 15:51:11
品牌 Logo 应用领域
芯科 - SILICON 时钟外围集成电路晶体
页数 文件大小 规格书
69页 885K
描述
Processor Specific Clock Generator, 808MHz, CMOS, PBGA80, 10 X 10 MM, ROHS COMPLIANT, PLASTIC, MO-192, BGA-80

SI5374B-A-GL 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:BGA包装说明:LBGA, BGA80,9X9,40
针数:80Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:2.28其他特性:CAN ALSO OPERATE AT 2.5V SUPPLY
JESD-30 代码:S-PBGA-B80JESD-609代码:e1
长度:10 mm端子数量:80
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:808 MHz封装主体材料:PLASTIC/EPOXY
封装代码:LBGA封装等效代码:BGA80,9X9,40
封装形状:SQUARE封装形式:GRID ARRAY, LOW PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED电源:1.8/2.5 V
主时钟/晶体标称频率:710 MHz认证状态:Not Qualified
座面最大高度:1.56 mm子类别:Clock Generators
最大压摆率:1100 mA最大供电电压:1.89 V
最小供电电压:1.71 V标称供电电压:1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches:1

SI5374B-A-GL 数据手册

 浏览型号SI5374B-A-GL的Datasheet PDF文件第2页浏览型号SI5374B-A-GL的Datasheet PDF文件第3页浏览型号SI5374B-A-GL的Datasheet PDF文件第4页浏览型号SI5374B-A-GL的Datasheet PDF文件第5页浏览型号SI5374B-A-GL的Datasheet PDF文件第6页浏览型号SI5374B-A-GL的Datasheet PDF文件第7页 
Si5374  
4-PLL ANY-FREQUENCY PRECISION CLOCK  
MULTIPLIER/JITTER ATTENUATOR  
Features  
Highly-integrated, 4 PLL clock  
multiplier/jitter attenuator  
Four independent DSPLLs support  
any-frequency synthesis and jitter  
attenuation  
Supports all ITU G.709 and any  
custom FEC ratios (239/237,  
255/238, 255/237, 255/236,  
253/226)  
Integrated loop filter with  
programmable bandwidth  
Simultaneous free-run and  
synchronous operation  
Automatic/manual hitless input clock  
switching  
Selectable output clock signal  
format (LVPECL, LVDS, CML,  
CMOS)  
LOL and interrupt alarm outputs  
I2C programmable  
8 inputs/8 outputs  
Each DSPLL can generate any  
frequency from 2 kHz to 808 MHz  
from a 2 kHz to 710 MHz input  
Ultra-low jitter clock outputs:  
350 fs rms (12 kHz–20 MHz) and  
410 fs rms (50 kHz–80 MHz) typical  
Meets ITU-T G.8251 and Telcordia  
GR-253-CORE OC-192 jitter  
specifications  
Ordering Information:  
See page 63.  
Single 1.8 V ±5% or 2.5 V ±10%  
operation with high PSRR on-chip  
voltage regulator  
10x10 mm PBGA  
Applications  
High-density, any-port, any-protocol, 1/2/4/8/10G Fibre Channel  
any-frequency line cards  
ITU-T G.709 OTN custom FEC  
10/40/100G  
GbE/10 GbE Synchronous Ethernet  
Carrier Ethernet, multi-service  
switches and routers  
MSPP, ROADM, P-OTS,  
muxponders  
OC-48/192, STM-16/64  
Description  
The Si5374 is a highly-integrated, 4-PLL, jitter-attenuating precision clock  
multiplier for applications requiring sub-1 ps jitter performance. Each of the  
DSPLL® clock multiplier engines accepts two input clocks ranging from 2 kHz to  
710 MHz and generates two independent synchronous output clocks ranging  
from 2 kHz to 808 MHz. The device provides virtually any frequency translation  
combination across this operating range. For asynchronous, free-running clock  
generation applications, the Si5374’s reference oscillator can be used as a clock  
source for any of the four DSPLLs. The Si5374 input clock frequency and clock  
multiplication ratio are programmable through an I2C interface. The Si5374 is  
based on Silicon Laboratories’ third-generation DSPLL® technology, which  
provides any-frequency synthesis and jitter attenuation in a highly-integrated  
PLL solution that eliminates the need for external VCXO and loop filter  
components. Each DSPLL loop bandwidth is digitally-programmable, providing  
jitter performance optimization at the application level. The device operates from  
a single 1.8 or 2.5 V supply with on-chip voltage regulators with excellent PSRR.  
The Si5374 is ideal for providing clock multiplication and jitter attenuation in  
high-port-count optical line cards requiring independent timing domains.  
Rev. 1.1 1/14  
Copyright © 2014 by Silicon Laboratories  
Si5374  

SI5374B-A-GL 替代型号

型号 品牌 替代类型 描述 数据表
SI5327D-C-GM SILICON

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