Datasheet > SI5369

SI5369

更新时间： 2024-11-08 01:21:59

品牌	Logo	应用领域
芯科 - SILICON		衰减器
页数	文件大小	规格书
84页	518K
描述
ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

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中文翻译

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数据手册

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SI5369 数据手册

Si5369

ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER

ATTENUATOR

Features



Generates any frequency from 2 kHz  Five clock outputs with selectable

to 945 MHz and select frequencies to

1.4 GHz from an input frequency of

2 kHz to 710 MHz

Ultra-low jitter clock outputs with jitter

generation as low as 300 fs rms

(12 kHz–20 MHz)

Integrated loop filter with selectable

loop bandwidth (4 Hz to 525 Hz)

Meets OC-192 GR-253-CORE jitter

specifications

Four clock inputs with manual or

automatically controlled hitless

switching and phase build-out

Supports holdover and freerun

modes of operation

signal format (LVPECL, LVDS, CML,

CMOS)



Support for ITU G.709 and custom

FEC ratios (253/226, 239/237,

255/238, 255/237, 255/236)

LOL, LOS, FOS alarm outputs

Digitally-controlled output phase

adjust

I²C or SPI programmable settings

On-chip voltage regulator for 1.8 V

±5%, 2.5 V ±10%, or 3.3 V ±10%

operation



Ordering Information:



See page 78.



Small size: 14 x 14 mm 100-pin

TQFP

Pb-free, RoHS compliant



SONET frame sync switching and

regeneration

Applications



SONET/SDH OC-48/STM-16/OC-

192/STM-64 line cards



OTN/WDM Muxponder, MSPP,

ROADM line cards



GbE/10GbE, 1/2/4/8/10G FC line cards  SONET/SDH + PDH clock

synthesis

ITU G.709 and custom FEC line cards

Wireless repeaters/wireless backhaul

Data converter clocking



Test and measurement

Synchronous Ethernet

Broadcast video

Description

The Si5369 is a jitter-attenuating precision clock multiplier for applications

requiring sub 1 ps rms jitter performance. The Si5369 accepts four clock inputs

ranging from 2 kHz to 710 MHz and generates five clock outputs ranging from

2 kHz to 945 MHz and select frequencies to 1.4 GHz. The device provides

virtually any frequency translation combination across this operating range. The

outputs are divided down separately from a common source. The Si5369 input

clock frequency and clock multiplication ratio are programmable through an I²C or

SPI interface. The Si5369 is based on Silicon Laboratories' third-generation

DSPLL^®technology, which provides any-frequency synthesis and jitter

attenuation in a highly integrated PLL solution that eliminates the need for

external VCXO and loop filter components. The DSPLL loop bandwidth is digitally

programmable, providing jitter performance optimization at the application level.

Operating from a single 1.8, 2.5 ,or 3.3 V supply, the Si5369 is ideal for providing

clock multiplication and jitter attenuation in high performance timing applications.

Rev. 1.0 1/13

Si5369

12 3 4 5 6 7...84

中文翻译

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与SI5369相关器件

型号	品牌	获取价格	描述	数据表
SI5369A-C-GQ	SILICON	获取价格	Processor Specific Clock Generator, 1417MHz, CMOS, PQFP100, TQFP-100
SI5369A-C-GQR	SILICON	获取价格	Processor Specific Clock Generator, 1417MHz, CMOS, PQFP100, TQFP-100
SI5369B-C-GQ	SILICON	获取价格	Processor Specific Clock Generator, 808MHz, CMOS, PQFP100, TQFP-100
SI5369B-C-GQR	SILICON	获取价格	Processor Specific Clock Generator, 808MHz, CMOS, PQFP100, TQFP-100
SI5369C-C-GQ	SILICON	获取价格	Processor Specific Clock Generator, 346MHz, CMOS, PQFP100, TQFP-100
SI5369D-C-GQ	SILICON	获取价格	ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
SI5374B-A-GL	SILICON	获取价格	Processor Specific Clock Generator, 808MHz, CMOS, PBGA80, 10 X 10 MM, ROHS COMPLIANT, PLAS
SI5375	SILICON	获取价格	4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR
SI5375B-A-BL	SILICON	获取价格	Processor Specific Clock Generator, 808MHz, CMOS, PBGA80, 10 X 10 MM, PLASTIC, MO-192, BGA
SI5375B-A-GL	SILICON	获取价格	Processor Specific Clock Generator, 808MHz, CMOS, PBGA80, 10 X 10 MM, ROHS COMPLIANT, PLAS

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