Datasheet > SI4450DY-T1

SI4450DY-T1

更新时间： 2024-11-06 19:55:07

品牌	Logo	应用领域
威世 - VISHAY		/
页数	文件大小	规格书
3页	28K
描述
Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET

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SI4450DY-T1 技术参数

SPICE Device Model Si4450DY

N-Channel Enhancement-Mode MOSFET

Characteristics

• N-channel Vertical DMOS

• Macro-Model (Subcircuit)

• Level 3 MOS

• Applicable Over a -55 to 125°C Temperature Range

• Models Gate Charge, Transient, and Diode Reverse

Recovery Characteristics

• Applicable for Both Linear and Switch Mode

Description

The attached SPICE Model describes typical electrical

characteristics of the n-channel vertical DMOS. The

subcircuit model was extracted and optimized over a

25°C to 125°C temperature range under pulse

conditions for 0 to 10 volt gate drives. Saturated output

impedance model accuracy has been maximized for gate

biases near threshold. A novel gate-to-drain feedback

capacitance network is used to model gate charge

characteristics while avoiding convergence problems of

switched C_gdmodel. Model parameter values are

optimized to provide a best fit to measured electrical

data and are not intended as an exact physical

description of a device.

Model Subcircuit

DBD

C_GS

This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to

the appropriate data sheet of the same number for guaranteed specification limits.

Siliconix

4/17/01

Document: 70908

12 3

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