NVMFD5852NL,
NVMFD5852NLWF
Power MOSFET
40 V, 6.9 mW, 44 A, Dual N−Channel Logic
Level, Dual SO−8FL
http://onsemi.com
Features
• Small Footprint (5x6 mm) for Compact Designs
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
• Low R
to Minimize Conduction Losses
DS(on)
• Low Capacitance to Minimize Driver Losses
• NVMFD5852NLWF − Wettable Flanks Product
• AEC−Q101 Qualified and PPAP Capable
• This is a Pb−Free Device
6.9 mW @ 10 V
40 V
44 A
12.0 mW @ 4.5 V
Dual N−Channel
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
D1
D2
J
Parameter
Drain−to−Source Voltage
Symbol
Value
40
Unit
V
V
DSS
Gate−to−Source Voltage
V
"20
44
V
GS
G1
G2
Continuous Drain Cur-
T
= 25°C
I
A
mb
D
rent R
(Notes 1,
Y
J−mb
T = 100°C
mb
31
2, 3, 4)
Steady
State
S1
S2
Power Dissipation
T
mb
= 25°C
P
27
13
15
W
A
D
R
(Notes 1, 2, 3)
Y
MARKING DIAGRAM
J−mb
T
mb
= 100°C
D1 D1
Continuous Drain Cur-
T = 25°C
I
A
D
1
rent R
& 4)
(Notes 1, 3
S1
G1
S2
G2
D1
D1
D2
D2
q
JA
T = 100°C
A
10.6
Steady
State
DFN8 5x6
(SO8FL)
5852xx
AYWZZ
Power Dissipation
(Notes 1 & 3)
T = 25°C
P
3.2
1.6
329
W
A
D
CASE 506BT
R
q
JA
T = 100°C
A
D2 D2
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
A
A
p
5852NL = Specific Device Code
for NVMFD5852NL
5852LW = Specific Device Code
for NVMFD5852NLWF
Operating Junction and Storage Temperature
T , T
J
−55 to
175
°C
stg
Source Current (Body Diode)
I
40
80
A
S
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceability
Single Pulse Drain−to−Source Avalanche
E
mJ
AS
Energy (T = 25°C, V = 10 V, I = 40 A,
J
GS
L(pk)
L = 0.1 mH, R = 25 W)
G
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
260
°C
L
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
†
Device
Package
Shipping
NVMFD5852NLT1G
DFN8
(Pb−Free)
1500 / Tape &
Reel
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter
Symbol
Value
Unit
NVMFD5852NLWFT1G
DFN8
(Pb−Free)
1500 / Tape &
Reel
Junction−to−Mounting Board (top) − Steady
State (Notes 2, 3)
R
5.6
Y
J−mb
°C/W
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Junction−to−Ambient − Steady State (Note 3)
R
47
q
JA
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
2
3. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second are higher but are dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
April, 2013 − Rev. 5
NVMFD5852NL/D