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NVMFD5875NLT1G

更新时间： 2024-11-20 01:05:47
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安森美 - ONSEMI /
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6页 82K
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Dual N−Channel Power MOSFET

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NVMFD5875NLT1G 数据手册

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NVMFD5875NL  
Product Preview  
Power MOSFET  
60 V, 33 mW, 22 A, Dual N−Channel, Logic  
Level, Dual SO8FL  
Features  
• Low R  
to Minimize Conduction Losses  
DS(on)  
www.onsemi.com  
• Low Capacitance to Minimize Driver Losses  
• NVMFD5875NLWF − Wettable Flanks Option for Enhanced Optical  
Inspection  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(on)  
• AEC−Q101 Qualified and PPAP Capable  
33 mW @ 10 V  
45 mW @ 4.5 V  
60 V  
22 A  
• These Devices are Pb−Free, Halogen Free and are RoHS Compliant  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Parameter  
Drain−to−Source Voltage  
Symbol  
Value  
60  
Unit  
V
Dual N−Channel  
V
DSS  
D1  
D2  
Gate−to−Source Voltage  
Continuous Drain Cur-  
V
"20  
22  
V
GS  
T
= 25°C  
= 100°C  
= 25°C  
I
A
C
D
rent R  
3, 4)  
(Notes 1, 2,  
q
JC  
T
C
15  
Steady  
State  
G1  
G2  
Power Dissipation  
(Notes 1, 2, 3)  
T
C
P
32  
W
A
D
R
q
JC  
S1  
S2  
T
C
= 100°C  
16  
Continuous Drain Cur-  
T = 25°C  
A
I
7
D
MARKING DIAGRAM  
rent R  
3, 4)  
(Notes 1 &  
q
JA  
T = 100°C  
A
5.8  
3.2  
2.2  
80  
Steady  
State  
D1 D1  
S1  
G1  
S2  
G2  
D1  
D1  
D2  
D2  
Power Dissipation  
(Notes 1, 3)  
T = 25°C  
A
P
W
D
1
R
q
JA  
5875xx  
AYWZZ  
T = 100°C  
A
DFN8 5x6  
(SO8FL)  
CASE 506BT  
Pulsed Drain Current  
T = 25°C, t = 10 ms  
I
DM  
A
A
p
D2 D2  
Operating Junction and Storage Temperature  
T , T  
−55 to  
+175  
°C  
J
stg  
5875NL = Specific Device Code  
for NVMFD5875NL  
Source Current (Body Diode)  
I
S
19  
A
5875LW = Specific Device Code  
for NVMFD5875NLWF  
Single Pulse Drain−  
to−Source Avalanche  
(I  
= 14.5 A, L =  
E
10.5  
mJ  
L(pk)  
AS  
0.1 mH)  
A
Y
= Assembly Location  
= Year  
Energy (T = 25°C,  
J
(I = 6.3 A, L =  
40  
V
DD  
= 24 V, V  
=
L(pk)  
GS  
W
ZZ  
= Work Week  
= Lot Traceability  
2 mH)  
10 V, R = 25 W)  
G
Lead Temperature for Soldering Purposes  
(1/8″ from case for 10 s)  
T
260  
°C  
L
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
ORDERING INFORMATION  
†
Device  
Package  
Shipping  
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)  
NVMFD5875NLT1G  
NVMFD5875NLWFT1G  
NVMFD5875NLT3G  
NVMFD5875NLWFT3G  
DFN8  
(Pb−Free)  
1500 / Tape &  
Reel  
Parameter  
Symbol  
Value  
4.65  
47  
Unit  
DFN8  
(Pb−Free)  
1500 / Tape &  
Reel  
Junction−to−Case − Steady State (Note 2, 3)  
Junction−to−Ambient − Steady State (Note 3)  
R
°C/W  
q
JC  
JA  
R
q
DFN8  
(Pb−Free)  
5000 / Tape &  
Reel  
1. The entire application environment impacts the thermal resistance values shown,  
they are not constants and are only valid for the particular conditions noted.  
2. Psi (Y) is used as required per JESD51−12 for packages in which  
substantially less than 100% of the heat flows to single case surface.  
DFN8  
(Pb−Free)  
5000 / Tape &  
Reel  
2
3. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
4. Maximum current for pulses as long as 1 second is higher but is dependent  
on pulse duration and duty cycle.  
This document contains information on a product under development. ON Semiconductor  
reserves the right to change or discontinue this product without notice.  
© Semiconductor Components Industries, LLC, 2015  
1
Publication Order Number:  
November, 2015 − Rev. P1  
NVMFD5875NL/D  
 
123456

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NVMFD5875NLT1G 替代型号

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