Datasheet > NVMFD5852NL_14

NVMFD5852NL_14

更新时间： 2024-09-29 01:13:51

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
6页	84K
描述
Power MOSFET

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中文翻译

获取价格

数据手册

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NVMFD5852NL_14 数据手册

NVMFD5852NL

Power MOSFET

40 V, 6.9 mW, 44 A, Dual N−Channel Logic

Level, Dual SO−8FL

Features

• Small Footprint (5x6 mm) for Compact Designs

http://onsemi.com

• Low R

to Minimize Conduction Losses

DS(on)

• Low Capacitance to Minimize Driver Losses

• NVMFD5852NLWF − Wettable Flanks Option for Enhanced Optical

Inspection

• AEC−Q101 Qualified and PPAP Capable

• This is a Pb−Free Device

MAX

I MAX

(BR)DSS

DS(on)

6.9 mW @ 10 V

40 V

44 A

12.0 mW @ 4.5 V

Dual N−Channel

MAXIMUM RATINGS (T = 25°C unless otherwise noted)

Parameter

Drain−to−Source Voltage

Symbol

Value

Unit

DSS

Gate−to−Source Voltage

"20

Continuous Drain Cur-

= 25°C

rent R

(Notes 1,

J−mb

T = 100°C

2, 3, 4)

Steady

State

Power Dissipation

= 25°C

(Notes 1, 2, 3)

J−mb

= 100°C

MARKING DIAGRAM

Continuous Drain Cur-

T = 25°C

D1 D1

rent R

& 4)

(Notes 1, 3

T = 100°C

10.6

Steady

State

DFN8 5x6

(SO8FL)

CASE 506BT

5852xx

AYWZZ

Power Dissipation

(Notes 1 & 3)

T = 25°C

3.2

1.6

329

T = 100°C

Pulsed Drain Current

T = 25°C, t = 10 ms

D2 D2

Operating Junction and Storage Temperature

T , T

−55 to

175

°C

5852NL = Specific Device Code

for NVMFD5852NL

stg

5852LW = Specific Device Code

for NVMFD5852NLWF

Source Current (Body Diode)

Single Pulse Drain−to−Source Avalanche

= Assembly Location

= Year

Energy (T = 25°C, V = 10 V, I = 40 A,

L(pk)

L = 0.1 mH, R = 25 W)

= Work Week

= Lot Traceability

Lead Temperature for Soldering Purposes

(1/8″ from case for 10 s)

260

°C

Stresses exceeding those listed in the Maximum Ratings table may damage the

device. If any of these limits are exceeded, device functionality should not be

assumed, damage may occur and reliability may be affected.

ORDERING INFORMATION

†

Device

Package

Shipping

THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)

NVMFD5852NLT1G

DFN8

(Pb−Free)

1500 / Tape &

Reel

Parameter

Symbol

Value

Unit

Junction−to−Mounting Board (top) − Steady

State (Notes 2, 3)

5.6

J−mb

NVMFD5852NLWFT1G

DFN8

(Pb−Free)

1500 / Tape &

Reel

°C/W

Junction−to−Ambient − Steady State (Note 3)

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

1. The entire application environment impacts the thermal resistance values shown,

they are not constants and are only valid for the particular conditions noted.

2. Psi (Y) is used as required per JESD51−12 for packages in which

substantially less than 100% of the heat flows to single case surface.

3. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.

4. Maximum current for pulses as long as 1 second are higher but are dependent

on pulse duration and duty cycle.

Publication Order Number:

September, 2014 − Rev. 6

NVMFD5852NL/D

12 3 4 5 6

中文翻译

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与NVMFD5852NL_14相关器件

型号	品牌	获取价格	描述	数据表
NVMFD5852NLT1G	ONSEMI	获取价格	Power MOSFET 40 V, 6.9 mohm, 44 A, Dual N.Channel Logic Level, Dual SO.8FL
NVMFD5852NLWF	ONSEMI	获取价格	Power MOSFET 40 V, 6.9 mohm, 44 A, Dual N.Channel Logic Level, Dual SO.8FL
NVMFD5852NLWFT1G	ONSEMI	获取价格	Power MOSFET 40 V, 6.9 mohm, 44 A, Dual N.Channel Logic Level, Dual SO.8FL
NVMFD5853N	ONSEMI	获取价格	Dual NâChannel Power MOSFET
NVMFD5853NL	ONSEMI	获取价格	Power MOSFET 40 V, 10 m, 34 A, Dual N.Channel Logic Level, Dual SO.8FL
NVMFD5853NLT1G	ONSEMI	获取价格	Power MOSFET 40 V, 10 m, 34 A, Dual N.Channel Logic Level, Dual SO.8FL
NVMFD5853NLWF	ONSEMI	获取价格	Power MOSFET 40 V, 10 m, 34 A, Dual N.Channel Logic Level, Dual SO.8FL
NVMFD5853NLWFT1G	ONSEMI	获取价格	Power MOSFET 40 V, 10 m, 34 A, Dual N.Channel Logic Level, Dual SO.8FL
NVMFD5853NT1G	ONSEMI	获取价格	Dual NâChannel Power MOSFET
NVMFD5853NWFT1G	ONSEMI	获取价格	Dual NâChannel Power MOSFET

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