NTD25P03L
Power MOSFET
−25 Amp, −30 Volt
Logic Level P−Channel DPAK
Designed for low voltage, high speed switching applications and to
withstand high energy in the avalanche and commutation modes. The
source−to−drain diode recovery time is comparable to a discrete fast
recovery diode.
http://onsemi.com
V
R
Typ
I Max
D
(BR)DSS
DS(on)
−30 V
51 mW @ 5.0 V
−25 A
Features
• Pb−Free Packages are Available
P−Channel
D
Typical Applications
• PWM Motor Controls
• Power Supplies
• Converters
G
• Bridge Circuits
S
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
MARKING DIAGRAMS
& PIN ASSIGNMENTS
Rating
Symbol
Value
Unit
Drain−to−Source Voltage
V
DSS
−30
V
4
Gate−to−Source Voltage
− Continuous
Drain
V
GSM
"15
"20
V
GS
− Non−Repetitive (tp ≤ 10 ms)
V
Vpk
4
DPAK
CASE 369C
STYLE 2
Drain Current
− Continuous @ T = 25°C
I
−25
−75
A
Apk
A
D
2
1
− Single Pulse (t ≤ 10 ms)
I
p
DM
3
Total Power Dissipation @ T = 25°C
P
75
W
A
D
2
1
Gate
3
Drain
Operating and Storage Temperature Range
T , T
J
−55 to
+150
°C
stg
Source
Single Pulse Drain−to−Source Avalanche
E
200
mJ
°C/W
°C
AS
4
Energy − Starting T = 25°C
J
Drain
(V = 25 Vdc, V = 5.0 Vdc,
DD
GS
4
Peak I = 20 Apk, L = 1.0 mH, R = 25 W)
L
G
DPAK−3
CASE 369D
STYLE 2
Thermal Resistance
− Junction−to−Case
R
R
R
1.65
67
120
q
JC
JA
JA
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
q
q
1
2
3
Maximum Lead Temperature for Soldering
Purposes, (1/8 in from case for 10 seconds)
T
260
L
1
2
3
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using 0.5 sq in pad size.
2. When surface mounted to an FR4 board using the minimum recommended
pad size.
Gate Drain Source
Y
= Year
= Work Week
= Device Code
= Pb−Free Package
WW
25P03L
G
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
March, 2006 − Rev. 3
NTD25P03L/D