Datasheet > NSBC114EDXV6/D

NSBC114EDXV6/D

更新时间： 2024-11-24 23:54:27

品牌	Logo	应用领域
其他 - ETC		晶体晶体管
页数	文件大小	规格书
10页	97K
描述
Dual Bias Resistor Transistor

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中文翻译

获取价格

数据手册

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NSBC114EDXV6/D 数据手册

NSBC114EDXV6T1,

NSBC114EDXV6T5

Preferred Devices

Dual Bias Resistor

Transistors

NPN Silicon Surface Mount Transistors

with Monolithic Bias Resistor Network

http://onsemi.com

(3)

(2)

(1)

The BRT (Bias Resistor Transistor) contains a single transistor with

a monolithic bias network consisting of two resistors; a series base

resistor and a base−emitter resistor. These digital transistors are

designed to replace a single device and its external resistor bias

network. The BRT eliminates these individual components by

integrating them into a single device. In the NSBC114EDXV6T1

series, two BRT devices are housed in the SOT−563 package which is

ideal for low power surface mount applications where board space is at

a premium.

(4)

(5)

(6)

NSBC114EDXV6T1

• Simplifies Circuit Design

• Reduces Board Space

• Reduces Component Count

• Lead−Free Solder Plating

MAXIMUM RATINGS

(T = 25°C unless otherwise noted, common for Q and Q )

SOT−563

CASE 463A

PLASTIC

Rating

Symbol

Value

Unit

Vdc

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

CBO

CEO

Vdc

MARKING DIAGRAM

100

mAdc

THERMAL CHARACTERISTICS

xx D

Characteristic

(One Junction Heated)

Symbol

Max

Unit

xx = Specific Device Code

Total Device Dissipation

(see table on following page)

= Date Code

T = 25°C

Derate above 25°C

357 (Note 1)

2.9 (Note 1)

mW/°C

Thermal Resistance −

Junction-to-Ambient

350 (Note 1)

°C/W

ORDERING INFORMATION

Characteristic

Device

Package

Shipping

(Both Junctions Heated)

Symbol

Max

Unit

NSBC114EDXV6T1 SOT−563

4 mm pitch

4000/Tape & Reel

Total Device Dissipation

T = 25°C

500 (Note 1)

4.0 (Note 1)

mW/°C

NSBC114EDXV6T5 SOT−563

2 mm pitch

Derate above 25°C

8000/Tape & Reel

Thermal Resistance −

Junction-to-Ambient

250 (Note 1)

°C/W

°C

DEVICE MARKING INFORMATION

Junction and Storage

Temperature Range

T , T

J stg

−55 to +150

See specific marking information in the device marking table

on page 2 of this data sheet.

1. FR−4 @ Minimum Pad

Preferred devices are recommended choices for future use

and best overall value.

Semiconductor Components Industries, LLC, 2004

Publication Order Number:

January, 2004 − Rev. 4

NSBC114EDXV6/D

12 3 4 5 6 7...10

中文翻译

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与NSBC114EDXV6/D相关器件

型号	品牌	获取价格	描述	数据表
NSBC114EDXV6_06	ONSEMI	获取价格	Dual Bias Resistor Transistors
NSBC114EDXV6T1	ONSEMI	获取价格	Dual Bias Resistor Transistors
NSBC114EDXV6T1G	ONSEMI	获取价格	Dual Bias Resistor Transistors
NSBC114EDXV6T5	ONSEMI	获取价格	Dual Bias Resistor Transistors
NSBC114EDXV6T5	ROCHESTER	获取价格	100mA, 50V, 2 CHANNEL, NPN, Si, SMALL SIGNAL TRANSISTOR, LEAD FREE, PLASTIC, CASE 463A-01,
NSBC114EDXV6T5G	ONSEMI	获取价格	Dual Bias Resistor Transistors
NSBC114EF3	ONSEMI	获取价格	Digital Transistors (BRT) R1 = 10 k, R2 = 10 k
NSBC114EF3T5G	ONSEMI	获取价格	Digital Transistors (BRT)
NSBC114EPDP6	ONSEMI	获取价格	Complementary Bias Resistor Transistors
NSBC114EPDP6T5G	ONSEMI	获取价格	Dual Digital Transistors (BRT)

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