Datasheet > NSBC114EPDXV6_04

NSBC114EPDXV6_04

更新时间： 2024-02-08 18:20:56

品牌	Logo	应用领域
安森美 - ONSEMI		晶体晶体管
页数	文件大小	规格书
14页	175K
描述
Dual Bias Resistor Transistors

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中文翻译

获取价格

数据手册

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NSBC114EPDXV6_04 数据手册

NSBC114EPDXV6T1,

NSBC114EPDXV6T5

Preferred Devices

Dual Bias Resistor

Transistors

NPN and PNP Silicon Surface Mount

Transistors with Monolithic Bias

Resistor Network

http://onsemi.com

(3)

(2)

(1)

The BRT (Bias Resistor Transistor) contains a single transistor with

a monolithic bias network consisting of two resistors; a series base

resistor and a base−emitter resistor. These digital transistors are

designed to replace a single device and its external resistor bias

network. The BRT eliminates these individual components by

integrating them into a single device. In the NSBC114EPDXV6T1

series, two complementary BRT devices are housed in the SOT−563

package which is ideal for low power surface mount applications

where board space is at a premium.

(4)

(5)

(6)

• Simplifies Circuit Design

• Reduces Board Space

• Reduces Component Count

• Available in 8 mm, 7 inch Tape and Reel

• Lead Free Solder Plating

SOT−563

CASE 463A

PLASTIC

MARKING DIAGRAM

MAXIMUM RATINGS (T = 25°C unless otherwise noted, common for Q

and Q , − minus sign for Q (PNP) omitted)

Rating

Symbol

Value

Unit

xx D

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

CBO

CEO

Vdc

xx = Specific Device Code

(see table on page 2)

100

mAdc

THERMAL CHARACTERISTICS

= Date Code

Characteristic

(One Junction Heated)

Symbol

Max

Unit

ORDERING INFORMATION

Total Device Dissipation

T = 25°C

357

(Note 1)

2.9

Device

Package

Shipping

Derate above 25°C

mW/°C

°C/W

(Note 1)

NSBC114EPDXV6T1 SOT−563

4 mm pitch

4000/Tape & Reel

Thermal Resistance Junction-to-Ambient

350

(Note 1)

NSBC114EPDXV6T5 SOT−563

2 mm pitch

8000/Tape & Reel

Characteristic

(Both Junctions Heated)

Symbol

Max

Unit

Total Device Dissipation

T = 25°C

500

(Note 1)

4.0

DEVICE MARKING INFORMATION

Derate above 25°C

mW/°C

°C/W

°C

See specific marking information in the device marking table

on page 2 of this data sheet.

(Note 1)

Thermal Resistance Junction-to-Ambient

Junction and Storage Temperature

1. FR−4 @ Minimum Pad

250

(Note 1)

Preferred devices are recommended choices for future use

and best overall value.

T , T

−55 to

+150

stg

Semiconductor Components Industries, LLC, 2004

Publication Order Number:

January, 2004 − Rev. 3

NSBC114EPDXV6/D

12 3 4 5 6 7...14

中文翻译

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与NSBC114EPDXV6_04相关器件

型号	品牌	获取价格	描述	数据表
NSBC114EPDXV6T1	ONSEMI	获取价格	Dual Bias Resistor Transistors
NSBC114EPDXV6T1	ROCHESTER	获取价格	100mA, 50V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR, PLASTIC, CASE 463A-01, 6
NSBC114EPDXV6T1G	ONSEMI	获取价格	Dual Bias Resistor Transistors
NSBC114EPDXV6T5	ONSEMI	获取价格	Dual Bias Resistor Transistors
NSBC114EPDXV6T5G	ONSEMI	获取价格	Dual Bias Resistor Transistors
NSBC114TDP6T5G	ONSEMI	获取价格	Dual NPN Bias Resistor Transistors
NSBC114TDXV6T1	ONSEMI	获取价格	Dual Bias Resistor Transistors
NSBC114TDXV6T1G	ONSEMI	获取价格	暂无描述
NSBC114TDXV6T5G	ONSEMI	获取价格	Dual NPN Bias Resistor Transistors
NSBC114TF3	ONSEMI	获取价格	Digital Transistors (BRT) R1 = 10 k, R2 = k

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