Datasheet > NLV74HC245ADTG

NLV74HC245ADTG

更新时间： 2024-09-16 01:08:15

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
7页	91K
描述
Octal 3-State Noninverting Bus Transceiver

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数据手册

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NLV74HC245ADTG 数据手册

MC74HC245A

Octal 3-State Noninverting

Bus Transceiver

High−Performance Silicon−Gate CMOS

The MC74HC245A is identical in pinout to the LS245. The device

inputs are compatible with standard CMOS outputs; with pull−up

resistors, they are compatible with LSTTL outputs.

http://onsemi.com

The HC245A is a 3−state noninverting transceiver that is used for

2−way asynchronous communication between data buses. The device

has an active−low Output Enable pin, which is used to place the I/O

ports into high−impedance states. The Direction control determines

whether data flows from A to B or from B to A.

SOIC−20

DW SUFFIX

CASE 751D

TSSOP−20

DT SUFFIX

CASE 948E

Features

PIN ASSIGNMENT

• Output Drive Capability: 15 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1 mA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7 A

• Chip Complexity: 308 FETs or 77 Equivalent Gates

• NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

DIRECTION

OUTPUT

ENABLE

• These Devices are Pb−Free, Halogen Free and are RoHS Compliant

LOGIC DIAGRAM

GND

MARKING DIAGRAMS

DATA

PORT

DATA

PORT

HC245A

AWLYYWWG

245A

ALYWG

SOIC−20

TSSOP−20

WL, L

YY, Y

= Assembly Location

= Wafer Lot

= Year

DIRECTION

OUTPUT

ENABLE

PIN 10 = GND

PIN 20 = V

WW, W = Work Week

G or G

= Pb−Free Package

(Note: Microdot may be in either location)

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Publication Order Number:

November, 2014 − Rev. 16

MC74HC245A/D

12 3 4 5 6 7

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