MC74HC4020A
14−Stage Binary Ripple
Counter
High−Performance Silicon−Gate CMOS
The MC74C4020A is identical in pinout to the standard CMOS
MC14020B. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LSTTL
outputs.
This device consists of 14 master−slave flip−flops with 12 stages
brought out to pins. The output of each flip−flop feeds the next and the
frequency at each output is half of that of the preceding one. Reset is
asynchronous and active−high.
State changes of the Q outputs do not occur simultaneously because
of internal ripple delays. Therefore, decoded output signals are subject
to decoding spikes and may have to be gated with the Clock of the
HC4020A for some designs.
http://onsemi.com
MARKING
DIAGRAMS
16
PDIP−16
N SUFFIX
CASE 648
MC74HC4020AN
AWLYYWWG
16
1
1
16
SOIC−16
D SUFFIX
CASE 751B
Features
HC4020AG
AWLYWW
16
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
1
1
16
• Low Input Current: 1 mA
TSSOP−16
DT SUFFIX
CASE 948F
HC40
20A
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With JEDEC Standard No. 7A Requirements
• Chip Complexity: 398 FETs or 99.5 Equivalent Gates
• Pb−Free Packages are Available*
16
ALYWG
1
G
1
16
1
SOEIAJ−16
F SUFFIX
CASE 966
16
74HC4020A
ALYWG
1
A
L, WL
Y, YY
= Assembly Location
= Wafer Lot
= Year
W, WW = Work Week
G
= Pb−Free Package
= Pb−Free Package
G
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
June, 2005 − Rev. 4
MC74HC4020A/D