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NLV74HC589ADR2G PDF预览

NLV74HC589ADR2G

更新时间: 2024-09-17 01:13:11
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安森美 - ONSEMI /
页数 文件大小 规格书
12页 142K
描述
8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output

NLV74HC589ADR2G 数据手册

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MC74HC589A  
8-Bit Serial or  
Parallel-Input/Serial-Output  
Shift Register with 3-State  
Output  
http://onsemi.com  
High−Performance Silicon−Gate CMOS  
The MC74HC589A device consists of an 8−bit storage latch which  
feeds parallel data to an 8−bit shift register. Data can also be loaded  
serially (see the Function Table). The shift register output, Q , is a  
3−state output, allowing this device to be used in bus−oriented  
systems.  
H
SOIC−16  
D SUFFIX  
CASE 751B  
TSSOP−16  
DT SUFFIX  
CASE 948F  
The HC589A directly interfaces with the SPI serial data port on  
CMOS MPUs and MCUs.  
PIN ASSIGNMENT  
B
C
1
2
3
4
5
6
7
8
16  
15  
14  
13  
V
A
CC  
Features  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
Low Input Current: 1 mA  
D
S
A
SERIAL SHIFT/  
PARALLEL LOAD  
E
F
12 LATCH CLOCK  
High Noise Immunity Characteristic of CMOS Devices  
G
11 SHIFT CLOCK  
OUTPUT  
10  
In Compliance with the Requirements Defined by JEDEC  
H
ENABLE  
Q
H
Standard No. 7 A  
GND  
9
Chip Complexity: 526 FETs or 131.5 Equivalent Gates  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
MARKING DIAGRAMS  
These Devices are Pb−Free, Halogen Free and are RoHS Compliant  
16  
HC589AG  
AWLYWW  
SERIAL  
14  
DATA  
INPUT  
S
A
1
SOIC−16  
15  
1
A
B
C
D
E
F
16  
2
V
= PIN 16  
HC  
589A  
ALYWG  
G
CC  
PARALLEL  
DATA  
INPUTS  
3
GND = PIN 8  
4
DATA  
LATCH  
SHIFT  
REGISTER  
5
1
6
TSSOP−16  
G
H
SERIAL  
DATA  
7
9
Q
H
OUTPUT  
A
= Assembly Location  
12  
LATCH CLOCK  
SHIFT CLOCK  
WL, L = Wafer Lot  
YY, Y = Year  
11  
13  
10  
WW, W = Work Week  
G or G = Pb−Free Package  
SERIAL SHIFT/  
PARALLEL LOAD  
(Note: Microdot may be in either location)  
OUTPUT ENABLE  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
Figure 1. Logic Diagram  
dimensions section on page 10 of this data sheet.  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
August, 2014 − Rev. 7  
MC74HC589A/D  

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