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NCP51820AMNTWG PDF预览

NCP51820AMNTWG

更新时间： 2024-11-24 02:52:59
品牌 Logo 应用领域
安森美 - ONSEMI 驱动接口集成电路驱动器
页数 文件大小 规格书
20页 787K
描述
High Speed Half-Bridge Driver for GaN Power Switches

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中文翻译

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NCP51820AMNTWG 技术参数

是否无铅： 不含铅生命周期：Active
包装说明：QFN-15Reach Compliance Code：unknown
Factory Lead Time：28 weeks 6 days风险等级：5.76
高边驱动器：YES输入特性：SCHMITT TRIGGER
接口集成电路类型：HALF BRIDGE BASED MOSFET DRIVERJESD-30 代码：S-XQCC-N15
长度：4 mm功能数量：2
端子数量：15最高工作温度：125 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：VQCCN封装等效代码：LCC15/20,.16SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, VERY THIN PROFILE
座面最大高度：0.9 mm最大压摆率：2.5 mA
最大供电电压：17 V最小供电电压：9 V
标称供电电压：15 V表面贴装：YES
温度等级：AUTOMOTIVE端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
断开时间：0.05 µs接通时间：0.05 µs
宽度：4 mmBase Number Matches：1

NCP51820AMNTWG 数据手册

 浏览型号NCP51820AMNTWG的Datasheet PDF文件第2页浏览型号NCP51820AMNTWG的Datasheet PDF文件第3页浏览型号NCP51820AMNTWG的Datasheet PDF文件第4页浏览型号NCP51820AMNTWG的Datasheet PDF文件第5页浏览型号NCP51820AMNTWG的Datasheet PDF文件第6页浏览型号NCP51820AMNTWG的Datasheet PDF文件第7页 
High Speed Half-Bridge  
Driver for GaN Power  
Switches  
NCP51820  
The NCP51820 high−speed, gate driver is designed to meet the  
stringent requirements of driving enhancement mode (e−mode), high  
electron mobility transistor (HEMT) and gate injection transistor  
(GIT), gallium nitrade (GaN) power switches in off−line, half−bridge  
power topologies. The NCP51820 offers short and matched  
propagation delays with advanced level shift technology providing  
−3.5 V to +650 V (typical) common mode voltage range for the  
high−side drive and −3.5 V to +3.5 V common mode voltage range for  
the low−side drive. In addition, the device provides stable dV/dt  
operation rated up to 200 V/ns for both driver output stages in high  
speed switching applications.  
To fully protect the gate of the GaN power transistor against  
excessive voltage stress, both drive stages employ a dedicated voltage  
regulator to accurately maintain the gate−source drive signal  
amplitude. The circuit actively regulates the driver’s bias rails and thus  
protects against potential gate−source over−voltage under various  
operating conditions.  
www.onsemi.com  
QFN15 4x4, 0.5P  
CASE 485FN  
MARKING DIAGRAM  
51820A  
ALYW G  
G
51820A = Specific Device Code  
The NCP51820 offers important protection functions such as  
independent under−voltage lockout (UVLO), monitoring VDD bias  
voltage and VDDH and VDDL driver bias and thermal shutdown  
based on die junction temperature of the device. Programmable  
dead−time control can be configured to prevent cross−conduction.  
A
L
YW  
G
= Assembly Site  
= Wafer Lot Number  
= Assembly Start Week  
= Pb−Free Package  
(Note: Microdot may be in either location)  
Features  
PIN ASSIGNMENT  
• 650 V, Integrated High−Side and Low−Side Gate Drivers  
• UVLO Protections for VDD High and Low−Side Drivers  
• Dual TTL Compatible Schmitt Trigger Inputs  
• Split Output Allows Independent Turn−ON/Turn−OFF Adjustment  
• Source Capability: 1 A; Sink Capability: 2 A  
VDDH  
1
2
3
4
13 EN  
12 HIN  
11 LIN  
HOSRC  
HOSNK  
SW  
• Separated HO and LO Driver Output Stages  
NCP51820  
(Top View)  
• 1 ns Rise and Fall Times Optimized for GaN Devices  
• SW and PGND: Negative Voltage Transient up to 3.5 V  
• 200 V/ns dV/dt Rating for all SW and PGND Referenced Circuitry  
• Maximum Propagation Delay of Less Than 50 ns  
• Matched Propagation Delays to Less Than 5 ns  
• User Programmable Dead−Time Control  
10 SGND  
9
DT  
• Thermal Shutdown (TSD)  
Typical Applications  
ORDERING INFORMATION  
• Driving GaN Power Transistors used in Full or Half−Bridge, LLC,  
Active Clamp Flyback or Forward, Totem Pole PFC and  
Synchronous Rectifier Topologies  
• Industrial Inverters and Motor Drives  
• AC to DC Converters  
†
Device  
NCP51820AMNTWG  
Package  
Shipping  
QFN15  
(Pb−Free)  
4000 / Tape  
& Reel  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
© Semiconductor Components Industries, LLC, 2019  
1
Publication Order Number:  
August, 2020 − Rev. 2  
NCP51820/D  
1234567...20

中文翻译

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