Datasheet > NCP51820GAN2GEVB

NCP51820GAN2GEVB

更新时间： 2024-11-24 02:57:23

品牌	Logo	应用领域
安森美 - ONSEMI		PC
页数	文件大小	规格书
20页	787K
描述
NCP51820 HighâSpeed, HalfâBridge, GaN Driver Evaluation Board for Existing or New PCB Designs

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NCP51820GAN2GEVB 数据手册

High Speed Half-Bridge

Driver for GaN Power

Switches

NCP51820

The NCP51820 high−speed, gate driver is designed to meet the

stringent requirements of driving enhancement mode (e−mode), high

electron mobility transistor (HEMT) and gate injection transistor

(GIT), gallium nitrade (GaN) power switches in off−line, half−bridge

power topologies. The NCP51820 offers short and matched

propagation delays with advanced level shift technology providing

−3.5 V to +650 V (typical) common mode voltage range for the

high−side drive and −3.5 V to +3.5 V common mode voltage range for

the low−side drive. In addition, the device provides stable dV/dt

operation rated up to 200 V/ns for both driver output stages in high

speed switching applications.

To fully protect the gate of the GaN power transistor against

excessive voltage stress, both drive stages employ a dedicated voltage

regulator to accurately maintain the gate−source drive signal

amplitude. The circuit actively regulates the driver’s bias rails and thus

protects against potential gate−source over−voltage under various

operating conditions.

www.onsemi.com

QFN15 4x4, 0.5P

CASE 485FN

MARKING DIAGRAM

51820A

ALYW G

51820A = Specific Device Code

The NCP51820 offers important protection functions such as

independent under−voltage lockout (UVLO), monitoring VDD bias

voltage and VDDH and VDDL driver bias and thermal shutdown

based on die junction temperature of the device. Programmable

dead−time control can be configured to prevent cross−conduction.

= Assembly Site

= Wafer Lot Number

= Assembly Start Week

= Pb−Free Package

(Note: Microdot may be in either location)

Features

PIN ASSIGNMENT

• 650 V, Integrated High−Side and Low−Side Gate Drivers

• UVLO Protections for VDD High and Low−Side Drivers

• Dual TTL Compatible Schmitt Trigger Inputs

• Split Output Allows Independent Turn−ON/Turn−OFF Adjustment

• Source Capability: 1 A; Sink Capability: 2 A

VDDH

13 EN

12 HIN

11 LIN

HOSRC

HOSNK

• Separated HO and LO Driver Output Stages

NCP51820

(Top View)

• 1 ns Rise and Fall Times Optimized for GaN Devices

• SW and PGND: Negative Voltage Transient up to 3.5 V

• 200 V/ns dV/dt Rating for all SW and PGND Referenced Circuitry

• Maximum Propagation Delay of Less Than 50 ns

• Matched Propagation Delays to Less Than 5 ns

• User Programmable Dead−Time Control

10 SGND

• Thermal Shutdown (TSD)

Typical Applications

ORDERING INFORMATION

• Driving GaN Power Transistors used in Full or Half−Bridge, LLC,

Active Clamp Flyback or Forward, Totem Pole PFC and

Synchronous Rectifier Topologies

• Industrial Inverters and Motor Drives

• AC to DC Converters

†

Device

NCP51820AMNTWG

Package

Shipping

QFN15

(Pb−Free)

4000 / Tape

& Reel

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

Publication Order Number:

August, 2020 − Rev. 2

NCP51820/D

12 3 4 5 6 7...20

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