NCP5203
2−in−1 DDR Power
Controller
The NCP5203 2−in−1 DDR Power Controller is a complete power
solution for an ACPI compliant high current DDR memory system.
This IC combines the efficiency of a PWM controller for the VDDQ
supply with the simplicity of linear regulator for the VTT
termination voltage. The NCP5203 contains a synchronous PWM
buck controller for driving two external NFETs to form the DDR
memory supply voltage (VDDQ). The $2.0 A user adjustable VTT
terminator regulator has short circuit protection. An internal power
good function monitors both the VDDQ and VTT outputs and signals
if a fault occurs. Protective features include soft−start, undervoltage
monitoring of 5VDUAL, over protection current (OCP), and thermal
shutdown. The IC is packaged in 18−lead QFN.
http://onsemi.com
MARKING
DIAGRAM
1
18
1
NCP5203
18−LEAD QFN, 5 x 6 mm
MN SUFFIX
AWLYYWW
CASE 505
Features
• Supports DDR I and DDR II
• Incorporates VDDQ, VTT Regulators
• Operates from Single 5 V Supply
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
• VTT Regulator includes Integrated Power FETs Sourcing/Sinking
up to 2.0 A
• All External Power MOSFETs are N−Channel
• Adjustable VDDQ
PIN CONNECTIONS
• Adjustable VTT
• Fixed Switching Frequency of 300 kHz for VDDQ in S0
• Fixed Switching Frequency of 600 kHz for VDDQ in S3
• Soft−Start Protection for VDDQ
• Undervoltage Monitor of 5VDUAL
• Short−Circuit Protection for VDDQ and VTT
• Thermal Shutdown
VDDQEN
VTTEN
PGOOD
REFSNS
FBVTT
AGND
SS
COMP
FBDDQ
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
VDDQ
VTT
PGND
BST
BGDDQ
TGDDQ
5VDUAL
SWDDQ
OCDDQ
• Housed in QFN−18
• Pb−Free Package is Available*
Typical Applications
ORDERING INFORMATION
• DDR Memory Supply and Termination Voltage
• Active Termination Busses (SSTL−2, SSTL−3)
†
Device
Package
Shipping
NCP5203MNR2
NCP5203MNR2G
QFN
2500 Tape & Reel
2500 Tape & Reel
QFN
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D
*For additional information on our Pb−Free strategy and soldering details, please
downloadthe ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
January, 2005 − Rev. 1
NCP5203/D