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NCP5210MNR2G PDF预览

NCP5210MNR2G

更新时间: 2024-11-26 04:37:55
品牌 Logo 应用领域
安森美 - ONSEMI 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管双倍数据速率
页数 文件大小 规格书
18页 172K
描述
3-in-1 PWM Dual Buck and Linear DDR Power Controller

NCP5210MNR2G 技术参数

是否无铅: 不含铅生命周期:Obsolete
零件包装代码:QFN包装说明:6 X 5 MM, LEAD FREE, PLASTIC, QFN-20
针数:20Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.71
Is Samacsys:N模拟集成电路 - 其他类型:DUAL SWITCHING CONTROLLER
控制模式:VOLTAGE-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:5.5 V最小输入电压:4.5 V
标称输入电压:5 VJESD-30 代码:R-PDSO-N20
JESD-609代码:e3长度:6 mm
湿度敏感等级:1功能数量:1
端子数量:20最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:HVSON封装等效代码:SOLCC20,.2,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1 mm子类别:Switching Regulator or Controllers
表面贴装:YES切换器配置:PUSH-PULL
最大切换频率:550 kHz温度等级:COMMERCIAL
端子面层:Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:5 mm
Base Number Matches:1

NCP5210MNR2G 数据手册

 浏览型号NCP5210MNR2G的Datasheet PDF文件第2页浏览型号NCP5210MNR2G的Datasheet PDF文件第3页浏览型号NCP5210MNR2G的Datasheet PDF文件第4页浏览型号NCP5210MNR2G的Datasheet PDF文件第5页浏览型号NCP5210MNR2G的Datasheet PDF文件第6页浏览型号NCP5210MNR2G的Datasheet PDF文件第7页 
NCP5210  
3−in−1 PWM Dual Buck  
and Linear DDR Power  
Controller  
The NCP5210, 3−in−1 PWM Dual Buck and Linear DDR Power  
Controller, is a complete power solution for MCH and DDR memory.  
This IC combines the efficiency of PWM controllers for the VDDQ  
supply and the MCH core supply voltage with the simplicity of linear  
regulator for the VTT termination voltage.  
This IC contains two synchronous PWM buck controller for driving  
four external N−Ch FETs to form the DDR memory supply voltage  
(VDDQ) and the MCH regulator. The DDR memory termination  
regulator (VTT) is designed to track at the half of the reference voltage  
with sourcing and sinking current.  
http://onsemi.com  
MARKING  
DIAGRAM  
20  
1
NCP5210  
AWLYYWW  
QFN−20  
MN SUFFIX  
1
Protective features include, soft−start circuitry, undervoltage  
monitoring of 5VDUAL and BOOT voltage, and thermal shutdown.  
The device is housed in a thermal enhanced space−saving  
QFN−20 package.  
CASE 505AB  
Features  
NCP5210= Specific Device Code  
A
= Assembly Location  
= Wafer Lot  
= Year  
Incorporates Synchronous PWM Buck Controllers for VDDQ and  
VMCH  
WL  
YY  
WW  
Integrated Power FETs with VTT Regulator Source/Sink up to 2.0 A  
= Work Week  
All External Power MOSFETs are N−Channel  
Adjustable VDDQ and VMCH by External Dividers  
VTT Tracks at Half the Reference Voltage  
PIN CONNECTIONS  
Fixed Switching Frequency of 250 kHz for VDDQ and VMCH  
COMP  
SW_DDQ  
BG_DDQ  
TG_DDQ  
BOOT  
Doubled Switching Frequency of 500 kHz for VDDQ Controller in  
Standby Mode to Optimize Inductor Current Ripple and Efficiency  
Soft−Start Protection for all Controllers  
Undervoltage Monitor of Supply Voltages  
Overcurrent Protections for DDQ and VTT Regulators  
Fully Complies with ACPI Power Sequencing Specifications  
FBDDQ  
SS  
PGND  
VTT  
5VDUAL  
COMP_1P5  
BUF_Cut  
TG_1P5  
VDDQ  
AGND  
FBVTT  
Short Circuit Protection Prevents Damage to Power Supply Due  
to Reverse DIMM Insertion  
DDQ_REF  
FB1P5  
BG_1P5  
GND_1P5  
Thermal Shutdown  
5x6 QFN−20 Package  
NOTE: Pin 21 is the thermal pad  
on the bottom of the device.  
Pb−Free Package is Available*  
ORDERING INFORMATION  
Applications  
Device  
NCP5210MNR2  
Package  
Shipping  
DDR I and DDR II Memory and MCH Power Supply  
QFN−20 2500 Tape & Reel  
NCP5210MNR2G QFN−20 2500 Tape & Reel  
(Pb−Free)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
January, 2005 − Rev. 4  
NCP5210/D  

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