NCP5220A
3−in−1 PWM Dual Buck and
Linear Power Controller
The NCP5220A 3−in−1 PWM Dual Buck and Linear Power
Controller, is a complete power solution for MCH and DDR memory.
This IC combines the efficiency of PWM controllers for the VDDQ
supply and the MCH core supply voltage with the simplicity of linear
regulator for the VTT termination voltage.
http://onsemi.com
This IC contains two synchronous PWM buck controllers for
driving four external N−Ch FETs to form the DDR memory supply
voltage (VDDQ) and the MCH regulator. The DDR memory
termination regulator (VTT) is designed to track at half of the
reference voltage with sourcing and sinking current.
20
DFN−20
MN SUFFIX
CASE 505AB
1
Protective features include, soft−start circuitry, undervoltage
monitoring of 5VDUAL, BOOT voltage and thermal shutdown. The
device is housed in a thermal enhanced space−saving DFN−20
package.
MARKING DIAGRAM
N5220A
AWLYYWW G
G
Features
• Incorporates Synchronous PWM Buck Controllers for VDDQ and
VMCH
1
• Integrated Power FETs with VTT Regulator Source/Sink up to 2.0 A
• All External Power MOSFETs are N−Channel
• Adjustable VDDQ and VMCH by External Dividers
• VTT Tracks at Half the Reference Voltage
• Fixed Switching Frequency of 250 kHz for VDDQ and VMCH
• Doubled Switching Frequency of 500 kHz for VDDQ Controller in
Standby Mode to Optimize Inductor Current Ripple and Efficiency
• Soft−Start Protection for All Controllers
• Undervoltage Monitor of Supply Voltages
• Overcurrent Protections for DDQ and VTT Regulators
• VTT Regulators Soft−Start Current Protection
N5220A = Device Code
A
= Assembly Location
WL
YY
WW
G
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
COMP
SW_DDQ
BG_DDQ
TG_DDQ
BOOT
FBDDQ
SS
PGND
VTT
• Fully Complies with ACPI Power Sequencing Specifications
• Short Circuit Protection Prevents Damage to Power Supply Due to
Reverse DIMM Insertion
5VDUAL
COMP_1P5
SLP_S3
VDDQ
AGND
FBVTT
• Thermal Shutdown
TG_1P5
SLP_S5
FB1P5
BG_1P5
• 5x6 DFN−20 Package
GND_1P5
• Pb−Free Package is Available*
NOTE: Pin 21 is the thermal pad
on the bottom of the device.
Typical Applications
• DDR I and DDR II Memory and MCH Power Supply
ORDERING INFORMATION
†
Device
Package
Shipping
NCP5220AMNR2
NCP5220AMNR2G
DFN−20 2500/Tape & Reel
DFN−20 2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
December, 2005 − Rev. 4
NCP5220A/D