NB6L11M
2.5V / 3.3V 1:2 Differential
CML Fanout Buffer
Multi−Level Inputs w/ Internal Termination
http://onsemi.com
MARKING
Description
The NB6L11M is a differential 1:2 CML fanout buffer. The
differential inputs incorporate internal 50 W termination resistors that
are accessed through the V pins and will accept LVPECL, LVCMOS,
DIAGRAM*
T
16
LVTTL, CML, or LVDS logic levels.
1
The V
pin is an internally generated voltage supply available
REFAC
NB6L
11M
QFN−16
MN SUFFIX
CASE 485G
to this device only. V
single−ended PECL or NECL inputs. For all single−ended input
conditions, the unused complementary differential input is connected
is used as a reference voltage for
REFAC
ALYWG
G
to V
as a switching reference voltage. V
may also rebias
REFAC
REFAC
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
capacitor−coupled inputs. When used, decouple V
0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, V output should be left open.
The device is housed in a small 3x3 mm 16 pin QFN package.
The NB6L11M is a member of the ECLinPS MAXt family of
high performance clock products.
with a
REFAC
REFAC
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
Features
• Maximum Input Clock Frequency > 4 GHz, Typical
• 225 ps Typical Propagation Delay
Q0
• 70 ps Typical Rise and Fall Times
VTD
Q0
• 0.5 ps maximum RMS Clock Jitter
D
D
• Differential CML Outputs, 380 mV peak−to−peak, typical
Q1
Q1
• LVPECL Operating Range: V = 2.375 V to 3.63 V with V = 0 V
CC
EE
VTD
• NECL Operating Range: V = 0 V with V = −2.375 V to −3.63 V
CC
EE
V
REFAC
• Internal Input Termination Resistors, 50 W
• VREFAC Reference Output
Figure 1. Simplified Logic Diagram
• Functionally Compatible with Existing 2.5 V / 3.3V LVEL, LVEP,
EP, and SG Devices
• −40°C to +85°C Ambient Operating Temperature
• These are Pb−Free Devices
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
©
Semiconductor Components Industries, LLC, 2007
1
Publication Order Number:
March, 2007 − Rev. 1
NB6L11M/D