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NB6L14 PDF预览

NB6L14

更新时间: 2024-12-01 03:46:59
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
10页 153K
描述
2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer

NB6L14 数据手册

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NB6L14  
2.5 V/3.3 Vꢀ3.0 GHz  
Differential 1:4 LVPECL  
Fanout Buffer  
MultiLevel Inputs with Internal Termination  
http://onsemi.com  
MARKING  
Description  
The NB6L14 is a 3.0 GHz differential 1:4 LVPECL fanout buffer.  
The differential inputs incorporate internal 50 termination resistors  
that are accessed through the VT pin. This feature allows the NB6L14  
to accept various logic standards, such as LVPECL, LVCMOS,  
LVTTL, CML, or LVDS logic levels. The VREF_AC reference output  
can be used to rebias capacitorcoupled differential or singleended  
input signals. The 1:4 fanout design was optimized for low output  
skew applications.  
DIAGRAM*  
16  
1
NB6L  
14  
QFN16  
MN SUFFIX  
CASE 485G  
ALYWG  
G
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
The NB6L14 is a member of the ECLinPS MAXfamily of high  
performance clock and data products.  
Features  
Maximum Input Clock Frequency > 2.5 GHz, Typical  
< 20 ps Within Device Output Skew  
330 ps Typical Propagation Delay  
145 ps Typical Rise and Fall Times  
Differential LVPECL Outputs, 720 mV Amplitude, Typical  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
LVPECL Mode Operating Range: V = 2.375 V to 3.63 V with  
CC  
GND = 0 V  
Internal 50 Input Termination Resistors Provided  
VREF_AC Reference Output Voltage  
40°C to +85°C Ambient Operating Temperature  
Available in 3 mm x 3 mm 16 Pin QFN  
These are PbFree Devices  
D
Q
Figure 1. Simplified Logic Diagram  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 9 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 0  
NB6L14/D  

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