NB4L16M

更新时间： 2024-11-23 03:20:43

品牌	Logo	应用领域
安森美 - ONSEMI		驱动器转换器时钟
页数	文件大小	规格书
12页	920K
描述
2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver / Receiver / Buffer / Translator with Internal Termination

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NB4L16M 数据手册

NB4L16M

2.5V/3.3V, 5 Gb/s Multi Level

Clock/Data Input to CML

Driver / Receiver / Buffer/

Translator with Internal

Termination

http://onsemi.com

MARKING

DIAGRAM*

Description

The NB4L16M is a differential driver/receiver/buffer/translator

which can accept LVPECL, LVDS, CML, HSTL, LVCMOS/LVTTL

and produce 400 mV CML output. The device is capable of receiving,

buffering, and translating a clock or data signal that is as small as

75 mV operating up to 3.5 GHz or 5.0 Gb/s, respectively. As such, it is

ideal for SONET, GigE, Fiber Channel and backplane applications

(see Table 6 and Figures 20, 21 22, and 23).

Differential inputs incorporate internal 50 W termination resistors

and accept LVPECL (Positive ECL), LVTTL/LVCMOS, CML, HSTL

or LVDS. The differential 16 mA CML output provides matching

internal 50 W termination, and 400 mV output swing when externally

NB4L

16M

ALYWG

QFN−16

MN SUFFIX

CASE 485G

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

receiver terminated, 50 W to V

(see Figure 19). These features

(Note: Microdot may be in either location)

provide transmission line termination on chip, at the receiver and

driver end, eliminating any use of additional external components.

*For additional marking information, refer to

Application Note AND8002/D.

The V , an internally generated voltage supply, is available to this

device only. For single−ended input configuration, the unused

complementary differential input is connected to V as a switching

reference voltage. The V

reference output can be used also to

re−bias capacitor coupled differential or single−ended output signals.

For the capacitor coupled input signals, V should be connected to

the V pin and bypassed to ground with a 0.01 mF capacitor. When

50 W

not used V should be left open.

This device is housed in a 3x3 mm 16 pin QFN package.

Application notes, models, and support documentation are available at

www.onsemi.com.

50 W

Features

• Maximum Input Clock Frequency up to 3.5 GHz

• Maximum Input Data Rate up to 5.0 Gb/s

• < 0.7 ps Maximum Clock RMS Jitter

• < 10 ps Maximum Data Dependent Jitter at 2.5 Gb/s

• 220 ps Typical Propagation Delay

• 60 ps Typical Rise and Fall Times

• CML Output with Operating Range:

Figure 1. Functional Block Diagram

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 11 of this data sheet.

= 2.375 V to 3.6 V with V = 0 V

• CML Output Level (400 mV Peak−to−Peak Output),

Differential Output Only

• 50 W Internal Input and Output Termination Resistors

• Functionally Compatible with Existing 2.5 V / 3.3 V LVEL, LVEP,

EP, and SG Devices

• Pb−Free Packages are Available

Semiconductor Components Industries, LLC, 2006

Publication Order Number:

February, 2006 − Rev. 1

NB4L16M/D

12 3 4 5 6 7...12

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与NB4L16M相关器件

型号	品牌	获取价格	描述	数据表
NB4L16MMN	ONSEMI	获取价格	2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver / Receiver / Buffer / Transla
NB4L16MMNG	ONSEMI	获取价格	2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver / Receiver / Buffer / Transla
NB4L16MMNR2	ONSEMI	获取价格	2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver / Receiver / Buffer / Transla
NB4L16MMNR2G	ONSEMI	获取价格	2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver / Receiver / Buffer / Transla
NB4L339	ONSEMI	获取价格	3.3V 1:4 Clock Fanout Buffer
NB4L339_07	ONSEMI	获取价格	2.5 V / 3.3 V Differential 2:1 Clock IN to Differential LVPECL Clock Generator / Divider /
NB4L339_12	ONSEMI	获取价格	2.5 V / 3.3 V Differential 2:1 Clock IN to Differential LVPECL Clock Generator
NB4L339MNG	ONSEMI	获取价格	2.5 V / 3.3 V Differential 2:1 Clock IN to Differential LVPECL Clock Generator / Divider /
NB4L339MNR2G	ONSEMI	获取价格	2.5 V / 3.3 V Differential 2:1 Clock IN to Differential LVPECL Clock Generator / Divider /
NB4L339MNR4G	ONSEMI	获取价格	2.5 V / 3.3 V Differential 2:1 Clock IN to Differential LVPECL Clock Generator

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