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NB4L6254FAG

更新时间： 2024-11-26 03:46:59
品牌 Logo 应用领域
安森美 - ONSEMI 时钟驱动器逻辑集成电路
页数 文件大小 规格书
9页 137K
描述
2.5V / 3.3V Differential LVPECL 2x2 Clock Switch and Low Skew Fanout Buffer

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中文翻译

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NB4L6254FAG 技术参数

是否无铅：不含铅生命周期：Obsolete
零件包装代码：QFP包装说明：LQFP, QFP32,.35SQ,32
针数：32Reach Compliance Code：compliant
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.61Is Samacsys：N
系列：4L输入调节：DIFFERENTIAL
JESD-30 代码：S-PQFP-G32JESD-609代码：e3
长度：7 mm逻辑集成电路类型：LOW SKEW CLOCK DRIVER
湿度敏感等级：2功能数量：1
反相输出次数：端子数量：32
实输出次数：6最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：LQFP
封装等效代码：QFP32,.35SQ,32封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE峰值回流温度（摄氏度）：260
电源：2.5/3.3 VProp。Delay @ Nom-Sup：0.61 ns
传播延迟（tpd）：0.485 ns认证状态：Not Qualified
Same Edge Skew-Max（tskwd）：0.05 ns座面最大高度：1.6 mm
子类别：Clock Drivers最大供电电压 (Vsup)：3.465 V
最小供电电压 (Vsup)：2.375 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：BIPOLAR
温度等级：INDUSTRIAL端子面层：Tin (Sn)
端子形式：GULL WING端子节距：0.8 mm
端子位置：QUAD处于峰值回流温度下的最长时间：40
宽度：7 mm最小 fmax：3000 MHz
Base Number Matches：1

NB4L6254FAG 数据手册

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NB4L6254  
2.5V / 3.3V Differential  
LVPECL 2x2 Clock Switch  
and Low Skew Fanout  
Buffer  
http://onsemi.com  
MARKING  
Description  
The NB4L6254 is a differential 2x2 clock switch and drives  
precisely aligned clock signals through its LVPECL fanout buffers. It  
employs a fully differential architecture with bipolar technology,  
offers superior digital signal characteristics, has very low clock output  
skew and supports clock frequencies from DC up to 3.0 GHz.  
The NB4L6254 is designed for the most demanding, skew critical  
differential clock distribution systems. Typical applications for the  
NB4L6254 are clock distribution, switching and data loopback  
systems of high−performance computer, networking and  
telecommunication systems, as well as on−board clocking of OC−3,  
OC−12 and OC−48 communication systems. In addition, the  
NB4L6254 can be configured as a single 1:6 or dual 1:3 LVPECL  
fanout buffer.  
DIAGRAM*  
NB4L  
6254  
AWLYYWWG  
LQFP−32  
FA SUFFIX  
CASE 873A  
A
= Assembly Location  
WL  
YY  
WW  
G
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
The NB4L6254 can be operated from a single 3.3 V or 2.5 V power  
supply.  
*For additional marking information, refer to  
Application Note AND8002/D.  
Features  
V
CC  
• Maximum Clock Input Frequency, 3 GHz  
• Maximum Input Data Rate, 3 Gb/s  
Bank A  
QA0  
QA0  
CLK0  
0
1
CLK0  
QA1  
QA1  
QA2  
QA2  
• Differential LVPECL Inputs and Outputs  
• Low Output Skew: 50 ps Maximum Output−to−Output Skew  
• Synchronous Output Enable Eliminating Output Runt Pulse  
V
CC  
Generation and Metastability  
Bank B  
QB0  
QB0  
QB1  
QB1  
QB2  
QB2  
CLK1  
CLK1  
0
1
• Operating Range: Single 3.3 V or 2.5 V Supply  
V
CC  
= 2.375 V to 3.465 V  
• LVCMOS Compatible Control Inputs  
• Packaged in LQFP−32  
• Fully Differential Architecture  
• −40°C to 85°C Ambient Operating Temperature  
• These are Pb−Free Devices*  
SEL0  
SEL1  
OEA  
OEB  
Figure 1. Functional Block Diagram  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
August, 2006 − Rev. 1  
NB4L6254/D  
1234567...9

中文翻译

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NB4L6254FAG 替代型号

型号 品牌 替代类型 描述 数据表
NB4L6254FAR2G ONSEMI

完全替代

 2.5V / 3.3V Differential LVPECL 2x2 Clock Switch and Low Skew Fanout Buffer

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