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NB4N11SMNG PDF预览

NB4N11SMNG

更新时间： 2024-01-03 18:16:35
品牌 Logo 应用领域
安森美 - ONSEMI 输出元件接口集成电路锁存器
页数 文件大小 规格书
10页 105K
描述
PECL TO LVDS TRANSLATOR, COMPLEMENTARY OUTPUT, QCC16, 3 X 3 MM, LEAD FREE, QFN-16

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NB4N11SMNG 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN,针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.81其他特性：CML, LVCMOS, LVTTL OR LVDS TO LVDS TRANSLATION ALSO POSSIBLE
最大延迟：0.47 ns接口集成电路类型：PECL TO LVDS TRANSLATOR
JESD-30 代码：S-XQCC-N16长度：3 mm
湿度敏感等级：1位数：1
功能数量：1端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
输出锁存器或寄存器：NONE输出极性：COMPLEMENTARY
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：1 mm最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：Nickel/Gold/Palladium (Ni/Au/Pd)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：3 mm
Base Number Matches：1

NB4N11SMNG 数据手册

 浏览型号NB4N11SMNG的Datasheet PDF文件第2页浏览型号NB4N11SMNG的Datasheet PDF文件第3页浏览型号NB4N11SMNG的Datasheet PDF文件第4页浏览型号NB4N11SMNG的Datasheet PDF文件第5页浏览型号NB4N11SMNG的Datasheet PDF文件第6页浏览型号NB4N11SMNG的Datasheet PDF文件第7页 
NB4N11S  
3.3 V 1:2 AnyLevel™ Input  
to LVDS Fanout Buffer /  
Translator  
The NB4N11S is a differential 1:2 Clock or Data Receiver and will  
TM  
accept AnyLevel  
input signals: LVPECL, CML, LVCMOS,  
http://onsemi.com  
MARKING  
LVTTL, or LVDS. These signals will be translated to LVDS and two  
identical copies of Clock or Data will be distributed, operating up to  
2.0 GHz or 2.5 Gb/s, respectively. As such, the NB4N11S is ideal for  
SONET, GigE, Fiber Channel, Backplane and other Clock or Data  
distribution applications.  
DIAGRAM*  
16  
1
The NB4N11S has a wide input common mode range from  
NB4N  
11S  
1
GND + 50 mV to V − 50 mV. Combined with the 50 W internal  
CC  
termination resistors at the inputs, the NB4N11S is ideal for  
translating a variety of differential or single−ended Clock or Data  
signals to 350 mV typical LVDS output levels.  
QFN−16  
ALYW  
MN SUFFIX  
CASE 485G  
The NB4N11S is functionally equivalent to the EP11, LVEP11,  
SG11 or 7L11M devices and is offered in a small 3 mm X 3 mm  
16−QFN package. Application notes, models, and support  
documentation are available at www.onsemi.com.  
A
L
Y
W
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
Features  
• Maximum Input Clock Frequency > 2.0 GHz  
• Maximum Input Data Rate > 2.5 Gb/s  
• 1 ps Maximum of RMS Clock Jitter  
• Typically 10 ps of Data Dependent Jitter  
• 380 ps Typical Propagation Delay  
• 120 ps Typical Rise and Fall Times  
• Functionally Compatible with Existing 3.3 V LVEL, LVEP, EP, and  
SG Devices  
*For additional marking information, refer to  
Application Note AND8002/D.  
Q0  
V
V
Q0  
TD  
D
D
TD  
Q1  
Q1  
Device DDJ = 10 ps  
Figure 1. Logic Diagram  
TIME (58 ps/div)  
Figure 2. Typical Output Waveform at 2.488 Gb/s with  
PRBS 223−1 (VINPP = 400 mV; Input Signal DDJ = 14 ps)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 9 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
December, 2005 − Rev. 0  
NB4N11S/D  
1234567...10

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