Datasheet > NB4N507A_06

NB4N507A_06

更新时间： 2024-11-29 03:46:59

品牌	Logo	应用领域
安森美 - ONSEMI		时钟
页数	文件大小	规格书
7页	124K
描述
3.3V/5V, 50 MHz to 200 MHz PECL Clock Synthesizer

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NB4N507A_06 数据手册

NB4N507A

3.3V/5V, 50 MHz to 200 MHz

PECL Clock Synthesizer

Description

The NB4N507A is a precision clock synthesizer which generates a

very low jitter differential PECL output clock. It produces a clock

output based on an integer multiple of an input reference frequency.

The NB4N507A accepts a standard fundamental mode crystal,

using Phase−Locked−Loop (PLL) techniques, will produce output

clocks up to 200 MHz. In addition, the PLL circuitry will produce a

50% duty cycle square−wave clock output.

http://onsemi.com

The NB4N507A can be programmed to generate a selection of input

reference frequency multiples. An exact 155.52 MHz output clock can

be generated from a 19.44 MHz crystal and the x8 multiplier selection.

The NB4N507A is intended for low output jitter clock generation.

SOIC−16

D SUFFIX

CASE 751B

Features

• Input Crystal Frequency of 10 − 27 MHz

• Enable Usage of Common Low−Cost Crystal

• Differential PECL Output Clock Frequencies up to 200 MHz

• Duty Cycle of 48%/52%

MARKING DIAGRAM

• Operating Range: V = 3.0 V to 5.5 V

• Ideal for SONET Applications and Oscillator Manufacturers

• Available in Die Form

• Packaged in 16−Pin Narrow SOIC

• Pb−Free Packages are Available*

NB4N507AG

AWLYWW

ꢀ

Osc

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

CLKOUT

PECL

VCO

ꢀ

Mult

S0 S1

Figure 1. Simplified Logic Block

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2006

Publication Order Number:

November, 2006 − Rev. 2

NB4N507A/D

12 3 4 5 6 7

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