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NB4L16MMN PDF预览

NB4L16MMN

更新时间: 2024-01-20 11:41:10
品牌 Logo 应用领域
安森美 - ONSEMI 驱动器转换器驱动程序和接口接口集成电路时钟
页数 文件大小 规格书
12页 920K
描述
2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver / Receiver / Buffer / Translator with Internal Termination

NB4L16MMN 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:QFN包装说明:3 X 3 MM, QFN-16
针数:16Reach Compliance Code:not_compliant
风险等级:5.31Is Samacsys:N
接口集成电路类型:INTERFACE CIRCUITJESD-30 代码:S-XQCC-N16
JESD-609代码:e0长度:3 mm
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC16,.12SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):240
电源:2.5/3.3 V认证状态:Not Qualified
最大接收延迟:0.265 ns座面最大高度:1 mm
子类别:Line Driver or Receivers最大压摆率:55 mA
最大供电电压:3.8 V最小供电电压:2.375 V
标称供电电压:2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn90Pb10)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:3 mmBase Number Matches:1

NB4L16MMN 数据手册

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NB4L16M  
2.5V/3.3V, 5 Gb/s Multi Level  
Clock/Data Input to CML  
Driver / Receiver / Buffer/  
Translator with Internal  
Termination  
http://onsemi.com  
MARKING  
DIAGRAM*  
Description  
16  
The NB4L16M is a differential driver/receiver/buffer/translator  
which can accept LVPECL, LVDS, CML, HSTL, LVCMOS/LVTTL  
and produce 400 mV CML output. The device is capable of receiving,  
buffering, and translating a clock or data signal that is as small as  
75 mV operating up to 3.5 GHz or 5.0 Gb/s, respectively. As such, it is  
ideal for SONET, GigE, Fiber Channel and backplane applications  
(see Table 6 and Figures 20, 21 22, and 23).  
Differential inputs incorporate internal 50 W termination resistors  
and accept LVPECL (Positive ECL), LVTTL/LVCMOS, CML, HSTL  
or LVDS. The differential 16 mA CML output provides matching  
internal 50 W termination, and 400 mV output swing when externally  
1
NB4L  
16M  
ALYWG  
G
1
QFN16  
MN SUFFIX  
CASE 485G  
A
L
Y
W
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
receiver terminated, 50 W to V  
(see Figure 19). These features  
CC  
(Note: Microdot may be in either location)  
provide transmission line termination on chip, at the receiver and  
driver end, eliminating any use of additional external components.  
*For additional marking information, refer to  
Application Note AND8002/D.  
The V , an internally generated voltage supply, is available to this  
BB  
device only. For singleended input configuration, the unused  
complementary differential input is connected to V as a switching  
BB  
reference voltage. The V  
reference output can be used also to  
V
BB  
CC  
rebias capacitor coupled differential or singleended output signals.  
For the capacitor coupled input signals, V should be connected to  
V
BB  
TD  
the V pin and bypassed to ground with a 0.01 mF capacitor. When  
TD  
R1  
R2  
R2  
R1  
50 W  
not used V should be left open.  
BB  
This device is housed in a 3x3 mm 16 pin QFN package.  
Application notes, models, and support documentation are available at  
www.onsemi.com.  
D
Q
Q
D
50 W  
Features  
V
TD  
Maximum Input Clock Frequency up to 3.5 GHz  
Maximum Input Data Rate up to 5.0 Gb/s  
< 0.7 ps Maximum Clock RMS Jitter  
< 10 ps Maximum Data Dependent Jitter at 2.5 Gb/s  
220 ps Typical Propagation Delay  
60 ps Typical Rise and Fall Times  
CML Output with Operating Range:  
V
EE  
Figure 1. Functional Block Diagram  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 11 of this data sheet.  
V
CC  
= 2.375 V to 3.6 V with V = 0 V  
EE  
CML Output Level (400 mV PeaktoPeak Output),  
Differential Output Only  
50 W Internal Input and Output Termination Resistors  
Functionally Compatible with Existing 2.5 V / 3.3 V LVEL, LVEP,  
EP, and SG Devices  
PbFree Packages are Available  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
February, 2006 Rev. 1  
NB4L16M/D  

NB4L16MMN 替代型号

型号 品牌 替代类型 描述 数据表
NB4L16MMNR2G ONSEMI

完全替代

2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver / Receiver / Buffer / Transla
NB4L16MMNG ONSEMI

完全替代

2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver / Receiver / Buffer / Transla

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