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MC74VHC08DTR PDF预览

MC74VHC08DTR

更新时间: 2024-11-04 15:46:07
品牌 Logo 应用领域
安森美 - ONSEMI 输入元件光电二极管逻辑集成电路触发器
页数 文件大小 规格书
7页 134K
描述
IC AHC/VHC SERIES, QUAD 2-INPUT AND GATE, PDSO14, TSSOP-14, Gate

MC74VHC08DTR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP14,.25
针数:14Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.12
系列:AHC/VHCJESD-30 代码:R-PDSO-G14
JESD-609代码:e0长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:AND GATE
最大I(ol):0.008 A功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/5.5 V
Prop。Delay @ Nom-Sup:9 ns传播延迟(tpd):14 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.2 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

MC74VHC08DTR 数据手册

 浏览型号MC74VHC08DTR的Datasheet PDF文件第2页浏览型号MC74VHC08DTR的Datasheet PDF文件第3页浏览型号MC74VHC08DTR的Datasheet PDF文件第4页浏览型号MC74VHC08DTR的Datasheet PDF文件第5页浏览型号MC74VHC08DTR的Datasheet PDF文件第6页浏览型号MC74VHC08DTR的Datasheet PDF文件第7页 
MC74VHC08  
Quad 2-Input AND Gate  
The MC74VHC08 is an advanced high speed CMOS 2input AND  
gate fabricated with silicon gate CMOS technology. It achieves high  
speed operation similar to equivalent Bipolar Schottky TTL while  
maintaining CMOS low power dissipation.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V  
systems to 3.0 V systems.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Features  
14  
High Speed: t = 4.3 ns (Typ) at V = 5.0 V  
PD  
CC  
14  
VHC08G  
AWLYWW  
Low Power Dissipation: I = 2.0 mA (Max) at T = 25°C  
CC  
A
1
High Noise Immunity: V  
= V  
= 28% V  
NIL CC  
NIH  
SOIC14  
D SUFFIX  
CASE 751A  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
1
Designed for 2.0 V to 5.5 V Operating Range  
Low Noise: V  
= 0.8 V (Max)  
14  
OLP  
14  
VHC  
08  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
ALYW  
1
ESD Performance:  
1
TSSOP  
Human Body Model > 2000 V;  
Machine Model > 200 V  
DT SUFFIX  
CASE 948G  
Chip Complexity: 24 FETs or 6 Equivalent Gates  
These Devices are PbFree and are RoHS Compliant  
14  
74VHC08  
ALYWG  
1
A1  
3
SOEIAJ14  
M SUFFIX  
CASE 965  
Y1  
2
1
B1  
4
A2  
6
Y2  
5
B2  
A
= Assembly Location  
= Year  
Y = AB  
9
WL, L = Wafer Lot  
Y
WW, W = Work Week  
A3  
8
Y3  
10  
B3  
12  
G or = PbFree Package  
A4  
11  
(Note: Microdot may be in either location)  
Y4  
13  
B4  
Figure 1. Logic Diagram  
FUNCTION TABLE  
V
B4  
13  
A4  
12  
Y4  
11  
B3  
10  
A3  
9
Y3  
8
CC  
Inputs  
Output  
14  
A
B
Y
L
L
L
H
L
L
L
H
H
L
H
H
1
2
3
4
5
6
7
A1  
B1  
Y1  
A2  
B2  
Y2 GND  
(Top View)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
Figure 2. Pinout: 14Lead Packages  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
May, 2011 Rev. 8  
MC74VHC08/D  

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