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MC74VHC125_17

更新时间： 2024-11-17 01:12:43
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 94K
描述
Quad Bus Buffer

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中文翻译

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MC74VHC125_17 数据手册

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MC74VHC125  
Quad Bus Buffer  
with 3−State Control Inputs  
The MC74VHC125 is a high speed CMOS quad bus buffer  
fabricated with silicon gate CMOS technology. It achieves high speed  
operation similar to equivalent Bipolar Schottky TTL while  
maintaining CMOS low power dissipation.  
www.onsemi.com  
The MC74VHC125 requires the 3−state control input (OE) to be set  
High to place the output into the high impedance state.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7 V, allowing the interface of 5 V  
systems to 3 V systems.  
14−LEAD SOIC  
14−LEAD TSSOP  
DT SUFFIX  
D SUFFIX  
CASE 751A  
CASE 948G  
Features  
• High Speed: t = 3.8ns (Typ) at V = 5 V  
PD  
CC  
• Low Power Dissipation: I = 4 mA (Max) at T = 25°C  
CC  
A
PIN CONNECTION AND  
MARKING DIAGRAM  
• High Noise Immunity: V  
= V  
= 28% V  
NIH  
NIL CC  
(Top View)  
• Power Down Protection Provided on Inputs  
• Balanced Propagation Delays  
OE1  
A1  
1
2
14  
13 OE4  
12  
V
CC  
• Designed for 2 V to 5.5 V Operating Range  
• Low Noise: V  
= 0.8 V (Max)  
OLP  
Y1  
3
4
A4  
• Pin and Function Compatible with Other Standard Logic Families  
• Latchup Performance Exceeds 300 mA  
OE2  
11 Y4  
A2  
Y2  
5
6
7
10 OE3  
• ESD Performance: Human Body Model; > 2000 V,  
Machine Model; > 200 V  
• Chip Complexity: 72 FETs or 18 Equivalent Gates  
9
8
A3  
Y3  
GND  
• NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
DEVICE MARKING INFORMATION  
See general marking information in the device marking  
section on page 6 of this data sheet.  
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS  
Compliant  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
LOGIC DIAGRAM  
FUNCTION TABLE  
Active−Low Output Enables  
dimensions section on page 2 of this data sheet.  
VHC125  
Inputs Output  
2
3
A1  
Y1  
A
OE  
Y
1
OE1  
H
L
L
L
H
L
5
4
6
X
H
Z
A2  
Y2  
Y3  
OE2  
9
8
A3  
10  
OE3  
12  
13  
11  
A4  
Y4  
OE4  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
October, 2017 − Rev. 8  
MC74VHC125/D  
12345678

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