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MC74VHC132 PDF预览

MC74VHC132

更新时间: 2024-11-03 22:58:15
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
6页 156K
描述
Quad 2-Input NAND Schmitt Trigger

MC74VHC132 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC74VHC132 is an advanced high speed CMOS Schmitt NAND  
trigger fabricated with silicon gate CMOS technology. It achieves high speed  
operation similar to equivalent Bipolar Schottky TTL while maintaining  
CMOS low power dissipation.  
Pin configuration and function are the same as the MC74VHC00, but the  
inputs have hysteresis and, with its Schmitt trigger function, the VHC132 can  
be used as a line receiver which will receive slow input signals.  
The internal circuit is composed of three stages, including a buffer output  
which provides high noise immunity and stable output. The inputs tolerate  
voltages up to 7V, allowing the interface of 5V systems to 3V systems.  
D SUFFIX  
14–LEAD SOIC PACKAGE  
CASE 751A–03  
DT SUFFIX  
14–LEAD TSSOP PACKAGE  
CASE 948G–01  
High Speed: t  
= 4.9ns (Typ) at V  
= 5V  
PD  
Low Power Dissipation: I  
CC  
= 2µA (Max) at T = 25°C  
CC  
A
High Noise Immunity: V  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
= V  
= 28% V  
NIH  
NIL CC  
Designed for 2V to 5.5V Operating Range  
Low Noise: V  
= 0.8V (Max)  
OLP  
M SUFFIX  
14–LEAD SOIC EIAJ PACKAGE  
CASE 965–01  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300mA  
ESD Performance: HBM > 2000V; Machine Model > 200V  
Chip Complexity: 72 FETs or 18 Equivalent Gates  
ORDERING INFORMATION  
MC74VHCXXD  
MC74VHCXXDT  
MC74VHCXXM  
SOIC  
TSSOP  
SOICEIAJ  
Pinout: 14–Lead Packages (Top View)  
V
B4  
13  
A4  
12  
Y4  
11  
B3  
10  
A3  
9
Y3  
8
CC  
14  
FUNCTION TABLE  
Inputs  
Output  
Y
A
B
L
L
H
H
L
H
L
H
H
H
L
1
2
3
4
5
6
7
H
A1  
B1  
Y1  
A2  
B2  
Y2  
GND  
LOGIC DIAGRAM  
1
2
4
5
9
A1  
A3  
B3  
A4  
B4  
3
6
8
Y1  
Y2  
Y3  
Y4  
10  
12  
13  
B1  
A2  
B2  
11  
6/97  
REV 0  
Motorola, Inc. 1997  

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