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MC74VHC04MELG PDF预览

MC74VHC04MELG

更新时间: 2024-11-04 19:57:35
品牌 Logo 应用领域
安森美 - ONSEMI 输入元件光电二极管逻辑集成电路触发器
页数 文件大小 规格书
5页 85K
描述
AHC/VHC SERIES, HEX 1-INPUT INVERT GATE, PDSO14, EIAJ, SOIC-14

MC74VHC04MELG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.47系列:AHC/VHC
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:10.2 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.008 A
功能数量:6输入次数:1
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/5.5 VProp。Delay @ Nom-Sup:8.5 ns
传播延迟(tpd):12 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:2.05 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:5.275 mmBase Number Matches:1

MC74VHC04MELG 数据手册

 浏览型号MC74VHC04MELG的Datasheet PDF文件第2页浏览型号MC74VHC04MELG的Datasheet PDF文件第3页浏览型号MC74VHC04MELG的Datasheet PDF文件第4页浏览型号MC74VHC04MELG的Datasheet PDF文件第5页 
MC74VHC04  
Hex Inverter  
The MC74VHC04 is an advanced high speed CMOS inverter  
fabricated with silicon gate CMOS technology. It achieves high speed  
operation similar to equivalent Bipolar Schottky TTL while  
maintaining CMOS low power dissipation.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems  
to 3 V systems.  
http://onsemi.com  
MARKING DIAGRAMS  
14  
Features  
SOIC−14  
D SUFFIX  
CASE 751A  
VHC04G  
AWLYWW  
High Speed: t = 3.8 ns (Typ) at V = 5 V  
PD  
CC  
1
Low Power Dissipation: I = 2 mA (Max) at T = 25°C  
CC  
A
1
High Noise Immunity: V  
= V  
= 28% V  
NIL CC  
NIH  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
14  
1
VHC  
04  
TSSOP−14  
DT SUFFIX  
CASE 948G  
Designed for 2 V to 5.5 V Operating Range  
ALYWG  
G
Low Noise: V  
= 0.8 V (Max)  
OLP  
1
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
A
= Assembly Location  
= Wafer Lot  
WL, L  
Y
ESD Performance: HBM > 2000 V; Machine Model > 200 V  
Chip Complexity: 36 FETs or 9 Equivalent Gates  
These Devices are Pb−Free and are RoHS Compliant  
= Year  
WW, W = Work Week  
G or G  
= Pb−Free Package  
(Note: Microdot may be in either location)  
1
3
5
2
4
6
A1  
A2  
A3  
Y1  
Y2  
Y3  
FUNCTION TABLE  
A1  
Y1  
V
CC  
Inputs  
A
Outputs  
Y
A6  
L
H
L
A2  
Y6  
A5  
Y5  
A4  
Y4  
H
Y2  
Y = A  
9
8
10  
12  
A4  
A5  
A6  
Y4  
Y5  
Y6  
A3  
ORDERING INFORMATION  
Device  
Package  
Shipping  
Y3  
11  
13  
MC74VHC04DR2G  
SOIC−14  
(Pb−Free)  
2500 / Tape &  
Reel  
GND  
MC74VHC04DTR2G TSSOP−14 2500 / Tape &  
(Pb−Free) Reel  
Figure 2. Pinout:  
14−Lead Packages  
(Top View)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
Figure 1. Logic Diagram  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
September, 2014 − Rev. 6  
MC74VHC04/D  

MC74VHC04MELG 替代型号

型号 品牌 替代类型 描述 数据表
MC74VHC04DR2G ONSEMI

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