5秒后页面跳转
MC74HC174ADR2 PDF预览

MC74HC174ADR2

更新时间: 2024-11-05 23:05:47
品牌 Logo 应用领域
安森美 - ONSEMI 触发器时钟
页数 文件大小 规格书
8页 158K
描述
Hex D Flip-Flop with Common Clock and Reset

MC74HC174ADR2 数据手册

 浏览型号MC74HC174ADR2的Datasheet PDF文件第2页浏览型号MC74HC174ADR2的Datasheet PDF文件第3页浏览型号MC74HC174ADR2的Datasheet PDF文件第4页浏览型号MC74HC174ADR2的Datasheet PDF文件第5页浏览型号MC74HC174ADR2的Datasheet PDF文件第6页浏览型号MC74HC174ADR2的Datasheet PDF文件第7页 
High–Performance Silicon–Gate CMOS  
The MC74HC174A is identical in pinout to the LS174. The device  
inputs are compatible with standard CMOS outputs; with pullup  
resistors, they are compatible with LSTTL outputs.  
http://onsemi.com  
This device consists of six D flip–flops with common Clock and  
Reset inputs. Each flip–flop is loaded with a low–to–high transition of  
the Clock input. Reset is asynchronous and active–low.  
MARKING  
DIAGRAMS  
16  
PDIP–16  
N SUFFIX  
CASE 648  
Output Drive Capability: 10 LSTTL Loads  
TTL NMOS Compatible Input Levels  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 1.0 µA  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
MC74HC174AN  
AWLYYWW  
16  
16  
1
1
16  
SO–16  
D SUFFIX  
CASE 751B  
HC174A  
AWLYWW  
1
1
Chip Complexity: 162 FETs or 40.5 Equivalent Gates  
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
LOGIC DIAGRAM  
3
4
2
5
Q0  
D0  
D1  
D2  
D3  
D4  
D5  
Q1  
Q2  
Q3  
Q4  
Q5  
PIN ASSIGNMENT  
6
7
DATA  
INPUTS  
NONINVERTING  
OUTPUTS  
11  
13  
14  
10  
12  
15  
RESET  
Q0  
1
2
3
4
5
6
7
8
16  
V
CC  
15 Q5  
14 D5  
13 D4  
12 Q4  
11 D3  
10 Q3  
D0  
9
1
D1  
CLOCK  
RESET  
PIN 16 = V  
CC  
PIN 8 = GND  
Q1  
D2  
Q2  
FUNCTION TABLE  
GND  
9
CLOCK  
Inputs  
Output  
Q
Reset Clock  
D
L
X
L
X
H
L
X
X
L
H
L
H
H
H
H
ORDERING INFORMATION  
No Change  
No Change  
Device  
Package  
PDIP–16  
SOIC–16  
SOIC–16  
Shipping  
MC74HC174AN  
MC74HC174AD  
MC74HC174ADR2  
2000 / Box  
48 / Rail  
Design Criteria  
Internal Gate Count*  
Value  
40.5  
1.5  
Units  
ea.  
ns  
2500 / Reel  
Internal Gate Propagation Delay  
Internal Gate Power Dissipation  
Speed Power Product  
5.0  
µW  
pJ  
.0075  
*Equivalent to a two–input NAND gate.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 7  
MC74HC174A/D  

MC74HC174ADR2 替代型号

型号 品牌 替代类型 描述 数据表
MC74HC174ADR2G ONSEMI

类似代替

Hex D Flip−Flop with Common Clock and Reset High−Performance Silicon−Gat
MC74HC174ADG ONSEMI

类似代替

Hex D Flip−Flop with Common Clock and Reset High−Performance Silicon−Gat
MC74HC174AD ONSEMI

类似代替

Hex D Flip-Flop with Common Clock and Reset

与MC74HC174ADR2相关器件

型号 品牌 获取价格 描述 数据表
MC74HC174ADR2G ONSEMI

获取价格

Hex D Flip−Flop with Common Clock and Reset High−Performance Silicon−Gat
MC74HC174ADT ONSEMI

获取价格

暂无描述
MC74HC174ADTR2 ONSEMI

获取价格

Hex D Flip−Flop with Common Clock and Reset High−Performance Silicon−Gat
MC74HC174ADTR2G ONSEMI

获取价格

Hex D Flip−Flop with Common Clock and Reset High−Performance Silicon−Gat
MC74HC174AFEL ONSEMI

获取价格

Hex D Flip−Flop with Common Clock and Reset High−Performance Silicon−Gat
MC74HC174AFELG ONSEMI

获取价格

Hex D Flip−Flop with Common Clock and Reset High−Performance Silicon−Gat
MC74HC174AN MOTOROLA

获取价格

Hex D Flip-Flop with Common Clock and Reset
MC74HC174AN ONSEMI

获取价格

Hex D Flip-Flop with Common Clock and Reset
MC74HC174ANG ONSEMI

获取价格

Hex D Flip−Flop with Common Clock and Reset High−Performance Silicon−Gat
MC74HC175 MOTOROLA

获取价格

Quad D Flip-Flop with Common Clock and Reset