MC100ES6111

更新时间： 2024-09-15 22:07:19

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		/
页数	文件大小	规格书
12页	129K
描述
LOW VOLTAGE 2.5/3.3V DIFFIERENTIAL ECL / PECL/ HSTL FANOUT BUFFER

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MC100ES6111 数据手册

Order Number: MC100ES6111/D

Rev 1, 05/2002

SEMICONDUCTOR TECHNICAL DATA

The Motorola MC100ES6111 is a bipolar monolithic differential clock

fanout buffer. Designed for most demanding clock distribution systems,

the MC100ES6111 supports various applications that require distribution

of precisely aligned differential clock signals. Using SiGe:C technology

and a fully differential architecture, the device offers very low skew

outputs and superior digital signal characteristics. Target applications for

this clock driver is high performance clock distribution in computing,

networking and telecommunication systems.

LOW–VOLTAGE

1:10 DIFFERENTIAL

ECL/PECL/HSTL

CLOCK FANOUT DRIVER

• 1:10 differential clock distribution

• 35 ps maximum device skew

• Fully differential architecture from input to all outputs

• SiGe:C technology supports near-zero output skew

• Supports DC to 2.7 GHz operation of clock or data signals

• ECL/PECL compatible differential clock outputs

• ECL/PECL/HSTL compatible differential clock inputs

• Single 3.3V, -3.3V, 2.5V or -2.5V supply

• Standard 32 lead LQFP package

FA SUFFIX

32–LEAD LQFP PACKAGE

CASE 873A

• Industrial temperature range

• Pin and function compatible to the MC100EP111

Functional Description

The MC100ES6111 is designed for low skew clock distribution systems and supports clock frequencies up to 2.7 GHz. The

device accepts two clock sources. The CLKA input can be driven by ECL or PECL compatible signals, the CLKB input accepts

HSTL compatible signals. The selected input signal is distributed to 10 identical, differential ECL/PECL outputs. If VBB is

connected to the CLKA input and bypassed to GND by a 10 nF capacitor, the MC100ES6111 can be driven by single-ended

ECL/PECL signals utilizing the VBB bias voltage output.

In order to meet the tight skew specification of the device, both outputs of a differential output pair should be terminated, even if

only one output is used. In the case where not all ten outputs are used, the output pairs on the same package side as the parts

being used on that side should be terminated.

The MC100ES6111 can be operated from a single 3.3V or 2.5V supply. As most other ECL compatible devices, the

MC100ES6111 supports positive (PECL) and negative (ECL) supplies. The MC100ES6111 is pin and function compatible to the

MC100EP111.

Motorola, Inc. 2002

12 3 4 5 6 7...12

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与MC100ES6111相关器件

型号	品牌	获取价格	描述	数据表
MC100ES6111AC	IDT	获取价格	Low Skew Clock Driver, 100E Series, 10 True Output(s), 0 Inverted Output(s), ECL, PQFP32,
MC100ES6111ACR2	IDT	获取价格	Low Skew Clock Driver, 100E Series, 10 True Output(s), 0 Inverted Output(s), ECL, PQFP32,
MC100ES6111D	MOTOROLA	获取价格	LOW VOLTAGE 2.5/3.3V DIFFIERENTIAL ECL / PECL/ HSTL FANOUT BUFFER
MC100ES6111FA	IDT	获取价格	Low Skew Clock Driver, 100E Series, 10 True Output(s), 0 Inverted Output(s), ECL, PQFP32,
MC100ES6111FA	MOTOROLA	获取价格	100E SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, PLAST
MC100ES6111FAR2	ROCHESTER	获取价格	100E SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, PLAST
MC100ES6111FAR2	MOTOROLA	获取价格	100E SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, PLAST
MC100ES6130	MOTOROLA	获取价格	2.5/3.3V 1:4 PECL Clock Driver with 2:1 Input MUX
MC100ES6130DT	MOTOROLA	获取价格	2.5/3.3V 1:4 PECL Clock Driver with 2:1 Input MUX
MC100ES6130DT	NXP	获取价格	暂无描述

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