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MC100ES6111FAR2 PDF预览

MC100ES6111FAR2

更新时间： 2024-11-09 19:51:19
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 驱动输出元件逻辑集成电路
页数 文件大小 规格书
7页 109K
描述
100E SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32, PLASTIC, LQFP-32

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中文翻译

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MC100ES6111FAR2 技术参数

生命周期：Transferred零件包装代码：QFP
包装说明：LQFP,针数：32
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.23其他特性：CAN ALSO OPERATE WITH 3.3V SUPPLY
系列：100E输入调节：DIFFERENTIAL MUX
JESD-30 代码：S-PQFP-G32长度：7 mm
逻辑集成电路类型：LOW SKEW CLOCK DRIVER功能数量：1
反相输出次数：端子数量：32
实输出次数：10封装主体材料：PLASTIC/EPOXY
封装代码：LQFP封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE传播延迟（tpd）：0.53 ns
认证状态：Not QualifiedSame Edge Skew-Max（tskwd）：0.035 ns
座面最大高度：1.6 mm最大供电电压 (Vsup)：2.625 V
最小供电电压 (Vsup)：2.375 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：ECL
端子形式：GULL WING端子节距：0.8 mm
端子位置：QUAD宽度：7 mm
Base Number Matches：1

MC100ES6111FAR2 数据手册

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Order Number: MC100ES6111/D  
Rev 1, 05/2002  
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SEMICONDUCTOR TECHNICAL DATA  
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The Motorola MC100ES6111 is a bipolar monolithic differential clock  
fanout buffer. Designed for most demanding clock distribution systems,  
the MC100ES6111 supports various applications that require distribution  
of precisely aligned differential clock signals. Using SiGe:C technology  
and a fully differential architecture, the device offers very low skew out-  
puts and superior digital signal characteristics. Target applications for this  
clock driver is high performance clock distribution in computing, network-  
ing and telecommunication systems.  
LOW–VOLTAGE  
1:10 DIFFERENTIAL  
ECL/PECL/HSTL  
CLOCK FANOUT DRIVER  
• 1:10 differential clock distribution  
• 35 ps maximum device skew  
• Fully differential architecture from input to all outputs  
• SiGe:C technology supports near-zero output skew  
• Supports DC to 2.7 GHz operation of clock or data signals  
• ECL/PECL compatible differential clock outputs  
• ECL/PECL/HSTL compatible differential clock inputs  
• Single 3.3V, -3.3V, 2.5V or -2.5V supply  
• Standard 32 lead LQFP package  
FA SUFFIX  
32–LEAD LQFP PACKAGE  
CASE 873A  
• Industrial temperature range  
• Pin and function compatible to the MC100EP111  
Functional Description  
The MC100ES6111 is designed for low skew clock distribution systems and supports clock frequencies up to 2.7 GHz. The  
device accepts two clock sources. The CLKA input can be driven by ECL or PECL compatible signals, the CLKB input accepts  
HSTL compatible signals. The selected input signal is distributed to 10 identical, differential ECL/PECL outputs. If VBB is con-  
nected to the CLKA input and bypassed to GND by a 10 nF capacitor, the MC100ES6111 can be driven by single-ended  
ECL/PECL signals utilizing the VBB bias voltage output.  
7
In order to meet the tight skew specification of the device, both outputs of a differential output pair should be terminated, even if  
only one output is used. In the case where not all ten outputs are used, the output pairs on the same package side as the parts  
being used on that side should be terminated.  
The MC100ES6111 can be operated from a single 3.3V or 2.5V supply. As most other ECL compatible devices, the  
MC100ES6111 supports positive (PECL) and negative (ECL) supplies. The MC100ES6111 is pin and function compatible to the  
MC100EP111.  
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA  
677  
1234567

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