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MC100ES6220AER2 PDF预览

MC100ES6220AER2

更新时间： 2024-11-30 14:30:23
品牌 Logo 应用领域
恩智浦 - NXP 驱动输出元件逻辑集成电路
页数 文件大小 规格书
12页 291K
描述
100E SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52, LEAD FREE, LQFP-52

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MC100ES6220AER2 技术参数

是否Rohs认证： 符合生命周期：Transferred
零件包装代码：QFP包装说明：LEAD FREE, LQFP-52
针数：52Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.27
其他特性：ECL MODE: VCC = 0V WITH VEE = -2.5V OR -3.3V SUPPLY; ALSO OPERATES AT 3.3V SUPPLY系列：100E
输入调节：DIFFERENTIALJESD-30 代码：S-PQFP-G52
JESD-609代码：e3长度：10 mm
逻辑集成电路类型：LOW SKEW CLOCK DRIVER最大I（ol）：0.005 A
湿度敏感等级：3功能数量：2
反相输出次数：端子数量：52
实输出次数：10封装主体材料：PLASTIC/EPOXY
封装代码：HLQFP封装等效代码：QFP52,.47SQ
封装形状：SQUARE封装形式：FLATPACK, HEAT SINK/SLUG, LOW PROFILE
峰值回流温度（摄氏度）：260电源：-2.5/-3.3/2.5/3.3 V
Prop。Delay @ Nom-Sup：0.5 ns传播延迟（tpd）：0.55 ns
认证状态：Not QualifiedSame Edge Skew-Max（tskwd）：0.13 ns
座面最大高度：1.7 mm子类别：Clock Drivers
最大供电电压 (Vsup)：2.625 V最小供电电压 (Vsup)：2.375 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
技术：ECL端子面层：MATTE TIN
端子形式：GULL WING端子节距：0.65 mm
端子位置：QUAD处于峰值回流温度下的最长时间：40
宽度：10 mm最小 fmax：1000 MHz
Base Number Matches：1

MC100ES6220AER2 数据手册

 浏览型号MC100ES6220AER2的Datasheet PDF文件第2页浏览型号MC100ES6220AER2的Datasheet PDF文件第3页浏览型号MC100ES6220AER2的Datasheet PDF文件第4页浏览型号MC100ES6220AER2的Datasheet PDF文件第5页浏览型号MC100ES6220AER2的Datasheet PDF文件第6页浏览型号MC100ES6220AER2的Datasheet PDF文件第7页 
MC100ES6220  
Rev 4, 04/2005  
Freescale Semiconductor  
Technical Data  
Low Voltage Dual 1:10 Differential  
ECL/PECL Clock Fanout Buffer  
MC100ES6220  
The MC100ES6220 is a bipolar monolithic differential clock fanout buffer.  
Designed for most demanding clock distribution systems, the MC100ES6220  
supports various applications that require the distribution of precisely aligned  
differential clock signals. Using SiGe technology and a fully differential  
architecture, the device offers very low skew outputs and superior digital signal  
characteristics. Target applications for this clock driver are high performance  
clock distribution in computing, networking and telecommunication systems.  
LOW VOLTAGE DUAL  
1:10 DIFFERENTIAL ECL/PECL  
CLOCK FANOUT BUFFER  
Features  
•
•
•
•
•
•
•
•
Two independent 1:10 differential clock fanout buffers  
130 ps maximum device skew  
SiGe technology  
Supports DC to 1 GHz operation of clock or data signals  
ECL/PECL compatible differential clock outputs  
ECL/PECL compatible differential clock inputs  
Single 3.3 V, –3.3 V, 2.5 V or –2.5 V supply  
TB SUFFIX  
52-LEAD LQFP PACKAGE  
EXPOSED PAD  
CASE 1336A-01  
Standard 52-lead LQFP package with exposed pad for enhanced thermal  
characteristics  
•
•
•
Supports industrial temperature range  
Pin and function compatible to the MC100EP220  
52-lead Pb-free Package Available  
AE SUFFIX  
52-LEAD LQFP PACKAGE  
Pb-FREE PACKAGE  
CASE 1336A-01  
Functional Description  
The MC100ES6220 is designed for low skew clock distribution systems and  
supports clock frequencies up to 1 GHz. The device consists of two independent  
clock fanout buffers. The CLKA and CLKB inputs can be driven by ECL or PECL compatible signals. The input signal of each  
clock buffer is distributed to 10 identical, differential ECL/PECL outputs. If VBB is connected to the CLKA or CLKB input and  
bypassed to GND by a 10 nF capacitor, the MC100ES6220 can be driven by single-ended ECL/PECL signals utilizing the VBB  
bias voltage output.  
In order to meet the tight skew specification of the device, both outputs of a differential output pair should be terminated, even  
if only one output is used. In the case where not all ten outputs are used, the output pairs on the same package side as the parts  
being used on that side should be terminated.  
The MC100ES6220 can be operated from a single 3.3 V or 2.5 V supply. As most other ECL compatible devices, the  
MC100ES6220 supports positive (PECL) and negative (ECL) supplies. The MC100ES6220 is pin and function compatible to the  
MC100EP220.  
© Freescale Semiconductor, Inc., 2005. All rights reserved.  
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MC100ES6221AER2 NXP

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MC100ES6221TB FREESCALE

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 		Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer
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