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MC100ES6210FAR2 PDF预览

MC100ES6210FAR2

更新时间： 2024-11-30 20:50:19
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
9页 141K
描述
Low Skew Clock Driver, 100E Series, 5 True Output(s), 0 Inverted Output(s), ECL, PQFP32, PLASTIC, LQFP-32

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MC100ES6210FAR2 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：QFP
包装说明：LQFP, QFP32,.35SQ,32针数：32
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.8
其他特性：ECL MODE: VCC = 0V WITH VEE = -2.5V OR -3.3V SUPPLY; ALSO OPERATES AT 3.3V SUPPLY系列：100E
输入调节：DIFFERENTIALJESD-30 代码：S-PQFP-G32
JESD-609代码：e0长度：7 mm
逻辑集成电路类型：LOW SKEW CLOCK DRIVER最大I（ol）：0.005 A
湿度敏感等级：3功能数量：2
反相输出次数：端子数量：32
实输出次数：5封装主体材料：PLASTIC/EPOXY
封装代码：LQFP封装等效代码：QFP32,.35SQ,32
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE
峰值回流温度（摄氏度）：240电源：-2.5/-3.3/2.5/3.3 V
Prop。Delay @ Nom-Sup：0.35 ns传播延迟（tpd）：0.35 ns
认证状态：Not QualifiedSame Edge Skew-Max（tskwd）：0.03 ns
座面最大高度：1.6 mm子类别：Clock Drivers
最大供电电压 (Vsup)：2.625 V最小供电电压 (Vsup)：2.375 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
技术：ECL端子面层：Tin/Lead (Sn85Pb15)
端子形式：GULL WING端子节距：0.8 mm
端子位置：QUAD处于峰值回流温度下的最长时间：20
宽度：7 mm最小 fmax：3000 MHz
Base Number Matches：1

MC100ES6210FAR2 数据手册

 浏览型号MC100ES6210FAR2的Datasheet PDF文件第2页浏览型号MC100ES6210FAR2的Datasheet PDF文件第3页浏览型号MC100ES6210FAR2的Datasheet PDF文件第4页浏览型号MC100ES6210FAR2的Datasheet PDF文件第5页浏览型号MC100ES6210FAR2的Datasheet PDF文件第6页浏览型号MC100ES6210FAR2的Datasheet PDF文件第7页 
Low Voltage 2.5V/3.3V Differential ECL/  
PECL/HSTL Fanout Buffer  
MC100ES6210  
DATA SHEET  
The MC100ES6210 is a bipolar monolithic differential clock fanout buffer. Designed for  
most demanding clock distribution systems, the MC100ES6210 supports various  
applications that require to distribute precisely aligned differential clock signals. Using SiGe  
LOW VOLTAGE DUAL  
technology and a fully differential architecture, the device offers very low clock skew outputs  
and superior digital signal characteristics. Target applications for this clock driver is high  
performance clock distribution in computing, networking and telecommunication systems.  
1:5 DIFFERENTIAL PECL/ECL/HSTL  
CLOCK FANOUT BUFFER  
Features  
•
•
•
•
•
•
•
•
•
•
•
•
Dual 1:5 differential clock distribution  
30 ps maximum device skew  
Fully differential architecture from input to all outputs  
SiGe technology supports near-zero output skew  
Supports DC to 3GHz operation of clock or data signals  
ECL/PECL compatible differential clock outputs  
ECL/PECL compatible differential clock inputs  
Single 3.3V, –3.3V, 2.5V or –2.5V supply  
Standard 32 lead LQFP and VFQFN packages  
Industrial temperature range  
FA SUFFIX  
32-LEAD LQFP PACKAGE  
CASE 873A-03  
AC SUFFIX  
32-LEAD LQFP PACKAGE  
Pb-FREE PACKAGE  
CASE 873A-03  
Pin and function compatible to the MC100EP210  
32-lead Pb-free Package Available  
Functional Description  
The MC100ES6210 is designed for low skew clock distribution systems and supports  
clock frequencies up to 3GHz. The device consists of two independent 1:5 clock fanout  
buffers. The input signal of each fanout buffer is distributed to five identical, differential ECL/  
PECL outputs. Both CLKA and CLKB inputs can be driven by ECL/PECL compatible  
signals.  
K SUFFIX  
32-LEAD VFQFN PACKAGE  
Pb-FREE PACKAGE  
If VBB is connected to the CLKA or CLKB input and bypassed to GND by a 10nF  
capacitor, the MC100ES6210 can be driven by single-ended ECL/PECL signals utilizing the  
VBB bias voltage output.  
In order to meet the tight skew specification of the device, both outputs of a differential  
output pair should be terminated, even if only one output is used. In the case where not all  
ten outputs are used, the output pairs on the same package side as the parts being used on  
that side should be terminated.  
The MC100ES6210 can be operated from a single 3.3V or 2.5V supply. As most other  
ECL compatible devices, the MC100ES6210 supports positive (PECL) and negative (ECL)  
supplies. The is function and pin compatible to the MC100EP210.  
ORDERING INFORMATION  
Device  
Package  
LQFP-32  
MC100ES6210FA  
MC100ES6210FAR2  
MC100ES6210AC  
MC100ES6210ACR2  
MC100ES6210KLF  
LQFP-32  
LQFP-32 (Pb-Free)  
LQFP-32 (Pb-Free)  
VFQFN-32 (Pb-Free)  
MPC100ES6210 REVISION 5 MARCH 20, 2012  
1
©2012 Integrated Device Technology, Inc.  
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MC100ES6220AE IDT

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 		Low Voltage Dual 1:10 Differential ECL/PECL Clock Fanout Buffer
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 		100E SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52, PLAST
MC100ES6220TBR2 MOTOROLA

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