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MC100EPT23DR2 PDF预览

MC100EPT23DR2

更新时间: 2024-11-23 22:14:03
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 68K
描述
Dual Differential LVPECL to LVTTL Translator

MC100EPT23DR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOIC-8
针数:8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.17最大延迟:1.8 ns
接口集成电路类型:PECL TO TTL TRANSLATORJESD-30 代码:R-PDSO-G8
JESD-609代码:e0长度:4.9 mm
位数:1功能数量:2
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C输出锁存器或寄存器:NONE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):240电源:3.3 V
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Level Translators最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn80Pb20)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9 mmBase Number Matches:1

MC100EPT23DR2 数据手册

 浏览型号MC100EPT23DR2的Datasheet PDF文件第2页浏览型号MC100EPT23DR2的Datasheet PDF文件第3页浏览型号MC100EPT23DR2的Datasheet PDF文件第4页浏览型号MC100EPT23DR2的Datasheet PDF文件第5页浏览型号MC100EPT23DR2的Datasheet PDF文件第6页浏览型号MC100EPT23DR2的Datasheet PDF文件第7页 
MC100EPT23  
3.3VꢀDual Differential  
LVPECL/LVDS to LVTTL  
Translator  
The MC100EPT23 is a dual differential LVPECL/LVDS to LVTTL  
translator. Because LVPECL (Positive ECL) or LVDS levels are used,  
only +3.3 V and ground are required. The small outline 8-lead package  
and the dual gate design of the EPT23 makes it ideal for applications  
which require the translation of a clock and a data signal.  
http://onsemi.com  
MARKING  
DIAGRAMS*  
The EPT23 is available in only the ECL 100K standard. Since there  
are no LVPECL outputs or an external V reference, the EPT23 does  
8
BB  
not require both ECL standard versions. The LVPECL/LVDS inputs  
are differential. Therefore, the MC100EPT23 can accept any standard  
KPT23  
ALYW  
SOIC−8  
D SUFFIX  
CASE 751  
8
differential LVPECL/LVDS input referenced from a V of +3.3 V.  
CC  
1
1
1
1.5 ns Typical Propagation Delay  
Maximum Operating Frequency > 275 MHz  
24 mA LVTTL Outputs  
8
TSSOP−8  
DT SUFFIX  
CASE 948R  
KA23  
ALYW  
8
Operating Range: V = 3.0 V to 3.6 V with GND = 0 V  
CC  
1
Pb−Free Packages are Available  
A = Assembly Location  
L = Wafer Lot  
Y = Year  
W = Work Week  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
February, 2005 − Rev. 11  
MC100EPT23/D  

MC100EPT23DR2 替代型号

型号 品牌 替代类型 描述 数据表
MC100LVELT23MNRG ONSEMI

完全替代

3.3V Dual Differential LVPECL/LVDS to LVTTL Translator
MC100EPT23DTR2G ONSEMI

完全替代

Dual Differential LVPECL to LVTTL Translator
MC100LVELT23DG ONSEMI

类似代替

3.3 V Dual Differential LVPECL/LVDS to LVTTL Translator

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