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MC100EPT25 PDF预览

MC100EPT25

更新时间: 2024-11-23 23:01:31
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 99K
描述
Differential LVECL/ECL to LVTTL Translator

MC100EPT25 数据手册

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The MC100EPT25 is a Differential LVECL/ECL to LVTTL  
translator. This device requires +3.3V, 3.3V to –5.2V, and ground.  
The small outline 8–lead SOIC package and the single gate of the  
EPT25 make it ideal for applications which require the translation of a  
clock or data signal.  
The VBB output allows the EPT25 to also be used in a single–ended  
input mode. In this mode the VBB output is tied to the D input for a  
non–inverting buffer or the D input for an inverting buffer. If used, the  
VBB pin should be bypassed to ground via a 0.01mF capacitator.  
http://onsemi.com  
MARKING  
DIAGRAMS*  
8
SO–8  
D SUFFIX  
CASE 751  
HPT25  
ALYW  
8
1
1.1ns Typical Propagation Delay  
275MHz Fmax (Clock bit stream, not pseudo–random)  
Differential LVECL/ECL inputs  
Small Outline SOIC Package  
24mA TTL outputs  
1
8
TSSOP–8  
DT SUFFIX  
CASE 948R  
HR25  
ALYW  
8
1
1
Flow Through Pinouts  
A = Assembly Location  
L = Wafer Lot  
Y = Year  
Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D  
Q Output will default LOW with inputs open or at GND  
ESD Protection: >4000V HBM, >200V MM  
W = Work Week  
*For additional information, see Application Note  
AND8002/D  
V Output  
BB  
New Differential Input Common Mode Range  
Moisture Sensitivity Level 1, Indefinite Time Out of Drypack.  
For Additional Information, See Application Note AND8003/D  
Flammability Rating: UL–94 code V–0 @ 1/8”,  
Oxygen Index 28 to 34  
PIN DESCRIPTION  
PIN  
Q
FUNCTION  
LVTTL Output  
Transistor Count = 111 devices  
D, D  
Differential LVECL Input Pair  
Positive Supply  
V
CC  
V
1
2
8
7
V
CC  
EE  
V
BB  
GND  
Output Reference Voltage  
Ground  
LVTTL  
V
EE  
Negative Supply  
D
Q
D
3
4
6
5
NC  
GND  
ORDERING INFORMATION  
LVECL  
Device  
Package  
Shipping  
MC100EPT25D  
MC100EPT25DR2  
MC100EPT25DT  
SO–8  
98 Units / Rail  
VBB  
SO–8  
2500 / Reel  
98 Units / Rail  
2500 / Reel  
TSSOP–8  
MC100EPT25DTR2 TSSOP–8  
Figure 1. 8–Lead Pinout (Top View) and Logic Diagram  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
May, 2000 – Rev. 1  
MC100EPT25/D  

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