MC100EPT23

更新时间： 2024-11-19 23:01:31

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
8页	68K
描述
Dual Differential LVPECL to LVTTL Translator

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MC100EPT23 数据手册

MC100EPT23

3.3VꢀDual Differential

LVPECL/LVDS to LVTTL

Translator

The MC100EPT23 is a dual differential LVPECL/LVDS to LVTTL

translator. Because LVPECL (Positive ECL) or LVDS levels are used,

only +3.3 V and ground are required. The small outline 8-lead package

and the dual gate design of the EPT23 makes it ideal for applications

which require the translation of a clock and a data signal.

http://onsemi.com

MARKING

DIAGRAMS*

The EPT23 is available in only the ECL 100K standard. Since there

are no LVPECL outputs or an external V reference, the EPT23 does

not require both ECL standard versions. The LVPECL/LVDS inputs

are differential. Therefore, the MC100EPT23 can accept any standard

KPT23

ALYW

SOIC−8

D SUFFIX

CASE 751

differential LVPECL/LVDS input referenced from a V of +3.3 V.

• 1.5 ns Typical Propagation Delay

• Maximum Operating Frequency > 275 MHz

• 24 mA LVTTL Outputs

TSSOP−8

DT SUFFIX

CASE 948R

KA23

ALYW

• Operating Range: V = 3.0 V to 3.6 V with GND = 0 V

• Pb−Free Packages are Available

A = Assembly Location

L = Wafer Lot

Y = Year

W = Work Week

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

Semiconductor Components Industries, LLC, 2005

Publication Order Number:

February, 2005 − Rev. 11

MC100EPT23/D

12 3 4 5 6 7 8

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MC100EPT23_06	ONSEMI	获取价格	3.3V Dual Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator
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MC100EPT23DG	ONSEMI	获取价格	Dual Differential LVPECL to LVTTL Translator
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MC100EPT23DT	ONSEMI	获取价格	Dual Differential LVPECL to LVTTL Translator
MC100EPT23DTG	ONSEMI	获取价格	Dual Differential LVPECL to LVTTL Translator
MC100EPT23DTR2	ONSEMI	获取价格	Dual Differential LVPECL to LVTTL Translator
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