Datasheet > M54HC10_04

M54HC10_04

更新时间： 2024-11-04 05:00:59

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		输入元件
页数	文件大小	规格书
8页	107K
描述
RAD-HARD TRIPLE 3-INPUT NAND GATE

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中文翻译

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数据手册

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M54HC10_04 数据手册

M54HC10

RAD-HARD TRIPLE 3-INPUT NAND GATE

■

HIGH SPEED:

= 8ns (TYP.) at V = 6V

LOW POWER DISSIPATION:

= 1µA(MAX.) at T =25°C

HIGH NOISE IMMUNITY:

= V = 28% V (MIN.)

NIH

NIL

DILC-14

FPC-14

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 4mA (MIN)

BALANCED PROPAGATION DELAYS:

ORDER CODES

PACKAGE

PLH

PHL

WIDE OPERATING VOLTAGE RANGE:

(OPR) = 2V to 6V

DILC

FPC

M54HC10D

M54HC10K

M54HC10D1

M54HC10K1

PIN AND FUNCTION COMPATIBLE WITH

54 SERIES 10

■

SPACE GRADE-1: ESA SCC QUALIFIED

50 krad QUALIFIED, 100 krad AVAILABLE ON

REQUEST

NO SEL UNDER HIGH LET HEAVY IONS

IRRADIATION

The internal circuit is composed of 3 stages

including buffer output, which enables high noise

immunity and stable output.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

■

DEVICE FULLY COMPLIANT WITH

SCC-9201-107

DESCRIPTION

The M54HC10 is an high speed CMOS TRIPLE

3-INPUT NAND GATE fabricated with silicon gate

C MOS technology.

PIN CONNECTION

March 2004

1/8

12 3 4 5 6 7 8

中文翻译

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