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M54HC109K PDF预览

M54HC109K

更新时间: 2024-11-04 05:00:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 触发器锁存器逻辑集成电路
页数 文件大小 规格书
10页 180K
描述
RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

M54HC109K 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:DFP
包装说明:CERAMIC, DFP-16针数:16
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.78Is Samacsys:N
系列:HC/UHJESD-30 代码:R-CDFP-F16
JESD-609代码:e0长度:9.94 mm
负载电容(CL):50 pF逻辑集成电路类型:J-KBAR FLIP-FLOP
最大频率@ Nom-Sup:21000000 Hz最大I(ol):0.004 A
位数:2功能数量:2
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DFP
封装等效代码:FL16,.3封装形状:RECTANGULAR
封装形式:FLATPACK峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/6 VProp。Delay @ Nom-Sup:45 ns
传播延迟(tpd):225 ns认证状态:Not Qualified
筛选级别:ESCC9000座面最大高度:2.38 mm
子类别:FF/Latches最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
总剂量:50k Rad(Si) V触发器类型:POSITIVE EDGE
宽度:6.91 mm最小 fmax:25 MHz
Base Number Matches:1

M54HC109K 数据手册

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M54HC109  
RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR  
HIGH SPEED :  
= 67MHz (TYP.) at V = 6V  
f
MAX  
CC  
LOW POWER DISSIPATION:  
=2µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
V
NIH  
NIL  
CC  
DILC-16  
FPC-16  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
WIDE OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
FM  
EM  
V
CC  
DILC  
FPC  
M54HC109D  
M54HC109K  
M54HC109D1  
M54HC109K1  
PIN AND FUNCTION COMPATIBLE WITH  
54 SERIES 109  
SPACE GRADE-1: ESA SCC QUALIFIED  
50 krad QUALIFIED, 100 krad AVAILABLE ON  
REQUEST  
NO SEL UNDER HIGH LET HEAVY IONS  
IRRADIATION  
input this device changes state on positive going  
transition of the clock pulse. CLEAR and PRESET  
are independent of the clock and are  
accomplished by a logic low on the corresponding  
input.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
DEVICE FULLY COMPLIANT WITH  
SCC-9306-048  
DESCRIPTION  
The M54HC109 is an high speed CMOS DUAL  
J-K FLIP FLOP WITH PRESET AND CLEAR  
2
fabricated with silicon gate C MOS technology. In  
accordance with the logic level on the J and K  
PIN CONNECTION  
March 2004  
1/10  

M54HC109K 替代型号

型号 品牌 替代类型 描述 数据表
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RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

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