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K3N6U1000C-TE150 PDF预览

K3N6U1000C-TE150

更新时间: 2024-11-24 19:51:23
品牌 Logo 应用领域
三星 - SAMSUNG 有原始数据的样本ROM光电二极管内存集成电路
页数 文件大小 规格书
4页 72K
描述
MASK ROM, 2MX16, 150ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44

K3N6U1000C-TE150 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:TSOP2,
针数:44Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.92最长访问时间:150 ns
备用内存宽度:8JESD-30 代码:R-PDSO-G44
长度:18.41 mm内存密度:33554432 bit
内存集成电路类型:MASK ROM内存宽度:16
功能数量:1端子数量:44
字数:2097152 words字数代码:2000000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-20 °C组织:2MX16
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):240
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.3 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:10.16 mmBase Number Matches:1

K3N6U1000C-TE150 数据手册

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K3N6V(U)1000C-TC(E)  
CMOS MASK ROM  
32M-Bit (4Mx8 /2Mx16) CMOS MASK ROM  
FEATURES  
· Switchable organization  
4,194,304x8(byte mode)  
2,097,152x16(word mode)  
· Fast access time  
3.3V Operation : 120ns(Max.)  
3.0V Operation : 150ns(Max.)  
· Supply voltage : single +3.0V/ single +3.3V  
· Current consumption  
Operating : 40mA(Max.)  
Standby : 30mA(Max.)  
GENERAL DESCRIPTION  
The K3N6V(U)1000C-TC(E) is a fully static mask programma-  
ble ROM fabricated using silicon gate CMOS process technol-  
ogy, and is organized either as 4,194,304x8 bit(byte mode) or  
as 2,097,152x16 bit(word mode) depending on BHE voltage  
level.(See mode selection table)  
This device operates with 3.0V or 3.3V power supply, and all  
inputs and outputs are TTL compatible.  
Because of its asynchronous operation, it re quires no external  
clock assuring extremely easy operation.  
It is suitable for use in program memory of microprocessor, and  
data memory, character generator.  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Three state outputs  
The K3N6V(U)1000C-TC(E) is packaged in a 44-TSOP2.  
· Package  
-. K3N6V(U)1000C-TC(E) : 44-TSOP2-400  
FUNCTIONAL BLOCK DIAGRAM  
PRODUCT INFORMATION  
Operating  
Temp Range  
Vcc Range Speed  
(Typical) (ns)  
Product  
A20  
X
MEMORY CELL  
MATRIX  
BUFFERS  
AND  
.
.
.
.
.
.
.
.
K3N6V(U)1000C-TC  
K3N6V(U)1000C-TE  
0°C~70°C  
(2,097,152x16/  
4,194,304x8)  
3.3V/3.0V 120/150  
-20°C~85°C  
DECODER  
Y
SENSE AMP.  
BUFFERS  
PIN CONFIGURATION  
BUFFERS  
AND  
DECODER  
A0  
N.C  
1
A20  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
A18  
2
3
A19  
A8  
A-1  
A17  
A7  
.
.
.
4
A9  
A6  
A5  
A4  
A3  
A10  
A11  
A12  
5
6
CE  
Q0/Q8  
Q7/Q15  
7
CONTROL  
LOGIC  
OE  
8
A13  
A14  
A15  
A2  
A1  
9
BHE  
10  
11  
12  
13  
14  
15  
16  
17  
18  
A16  
A0  
CE  
VSS  
OE  
Q0  
TSOP2  
BHE  
VSS  
Pin Name  
A0 - A20  
Pin Function  
Address Inputs  
Data Outputs  
Q15/A-1  
Q7  
Q0 - Q14  
Q8  
29 Q14  
28 Q6  
Q1  
Output 15(Word mode)/  
LSB Address(Byte mode)  
Q15 /A-1  
Q9  
Q13  
Q5  
27  
26  
25  
24  
23  
Q2 19  
BHE  
CE  
Word/Byte selection  
Chip Enable  
Output Enable  
Power  
Q10 20  
Q12  
Q4  
Q3  
21  
Q11  
22  
VCC  
OE  
VCC  
VSS  
N.C  
K3N6V(U)1000C-TC(E)  
Ground  
No Connection  

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