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K3N6U1000D-YE PDF预览

K3N6U1000D-YE

更新时间: 2024-11-21 19:27:55
品牌 Logo 应用领域
三星 - SAMSUNG 有原始数据的样本ROM光电二极管内存集成电路
页数 文件大小 规格书
5页 83K
描述
MASK ROM, 2MX16, 100ns, CMOS, PDSO48, 12 X 18 MM, TSOP1-48

K3N6U1000D-YE 技术参数

生命周期:Obsolete零件包装代码:TSOP1
包装说明:TSOP1,针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.84
最长访问时间:100 ns备用内存宽度:8
JESD-30 代码:R-PDSO-G48长度:16.4 mm
内存密度:33554432 bit内存集成电路类型:MASK ROM
内存宽度:16功能数量:1
端子数量:48字数:2097152 words
字数代码:2000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-20 °C
组织:2MX16封装主体材料:PLASTIC/EPOXY
封装代码:TSOP1封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.3 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL宽度:12 mm
Base Number Matches:1

K3N6U1000D-YE 数据手册

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K3N6V(U)1000D-YC(E)/K3N6S1000D-YC(E)  
CMOS MASK ROM  
32M-Bit (4Mx8 /2Mx16) CMOS MASK ROM  
FEATURES  
GENERAL DESCRIPTION  
· Switchable organization  
4,194,304x8(byte mode)  
2,097,152x16(word mode)  
· Fast access time  
The K3N6V(U)1000D-YC(E) and K3N6S1000D-YC(E) are fully  
static mask programmable ROM fabricated using silicon gate  
CMOS process technology, and is organized either as  
4,194,304 x8 bit(byte mode) or as 2,097,152x16 bit(word  
mode) depending on BHE voltage level.(See mode selection  
table)  
Random Access Time  
3.3V/3.0V Operation : 100ns(Max.)  
2.5V Operation : 150ns(Max.)  
· Supply voltage  
K3N6V(U)1000D-YC(E) : single +3.0V/ single +3.3V  
K3N6S1000D-YC(E) : single +2.5V  
· Current consumption  
This device operates with low power supply, and all inputs and  
outputs are TTL compatible.  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
Operating : 40mA(Max.)  
Standby : 30mA(Max.)  
It is suitable for use in program memory of microprocessor, and  
data memory, character generator.  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Three state outputs  
The K3N6V(U)1000D-YC(E) and K3N6S1000D-YC(E) are  
packaged in a 48-TSOP1.  
· Package  
-. K3N6V(U)1000D-YC(E)/K3N6S1000D-YC(E)  
: 48-TSOP1-1218  
FUNCTIONAL BLOCK DIAGRAM  
Pin Name  
A0 - A20  
Pin Function  
Address Inputs  
A20  
X
MEMORY CELL  
MATRIX  
BUFFERS  
AND  
.
.
.
.
.
.
.
.
(2,097,152x16/  
4,194,304x8)  
Q0 - Q14  
Data Outputs  
DECODER  
Output 15(Word mode)/  
LSB Address(Byte mode)  
Q15 /A-1  
BHE  
CE  
Word/Byte selection  
Chip Enable  
Output Enable  
Power  
Y
SENSE AMP.  
BUFFERS  
AND  
DATA OUT  
BUFFERS  
OE  
DECODER  
A0  
VCC  
VSS  
A-1  
.
.
.
Ground  
CE  
Q0/Q8  
Q7/Q15  
CONTROL  
LOGIC  
OE  
BHE  

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