Datasheet > IS66WVE2M16DBLL

IS66WVE2M16DBLL

更新时间： 2024-11-14 11:58:59

品牌	Logo	应用领域
美国芯成 - ISSI		静态存储器
页数	文件大小	规格书
28页	505K
描述
3.0V Core Async/Page PSRAM

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IS66WVE2M16DBLL 数据手册

IS66WVE2M16DBLL

3.0V Core Async/Page PSRAM

Overview

The IS66WVE2M16DBLL is an integrated memory device containing 32Mbit Pseudo Static Random Access

Memory using a self-refresh DRAM array organized as 2M words by 16 bits. The device includes several

power saving modes : Partial Array Refresh mode where data is retained in a portion of the array and

Deep Power Down mode. Both these modes reduce standby current drain. The die has separate power

rails, VDDQ and VSSQ for the I/O to be run from a separate power supply from the device core.

Features

 Asynchronous and page mode interface

 Dual voltage rails for optional performance

 VDD 2.7V~3.6V, VDDQ 2.7V~3.6V

 Page mode read access

 Interpage Read access : 70ns

 Intrapage Read access : 20ns

 Low Power Consumption

 Low Power Feature

 Temperature Controlled Refresh

 Partial Array Refresh

 Deep power-down (DPD) mode

 Operating temperature Range

Industrial -40°C~85°C

 Package:

48-ball TFBGA

 Asynchronous Operation < 30 mA

 Intrapage Read < 18mA

 Standby < 150 uA (max.)

 Deep power-down (DPD) < 3uA (Typ)

products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services

described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information

and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or

malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or

effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to

its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

www.issi.com - SRAM@issi.com

Rev.A | May 2012

12 3 4 5 6 7...28

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与IS66WVE2M16DBLL相关器件

型号	品牌	获取价格	描述	数据表
IS66WVE2M16DBLL-70BLI	ISSI	获取价格	Pseudo Static RAM, 2MX16, 70ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MO-207, TFBGA-48
IS66WVE2M16EALL	ISSI	获取价格	Asynchronous and page mode interface
IS66WVE2M16EALL-70BLI	ISSI	获取价格	Pseudo Static RAM, 2MX16, 70ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MO-207, TFBGA-48
IS66WVE2M16EALL-70BLI-TR	ISSI	获取价格	IC PSRAM 32MBIT 70NS 48BGA
IS66WVE2M16EBLL-70BLI	ISSI	获取价格	Pseudo Static RAM, 2MX16, 70ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MO-207, TFBGA-48
IS66WVE2M16ECLL-70BLI	ISSI	获取价格	Pseudo Static RAM, 2MX16, 70ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MO-207, TFBGA-48
IS66WVE2M16TCLL-70BLI	ISSI	获取价格	Pseudo Static RAM, 2MX16, 70ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MO-207, TFBGA-48
IS66WVE409616BLL-70BLI	ISSI	获取价格	Pseudo Static RAM, 4MX16, 70ns, CMOS, PBGA48, 6 X 8 MM, MO-207, TFBGA-48
IS66WVE4M16ALL	ISSI	获取价格	1.8V Core Async/Page PSRAM
IS66WVE4M16ALL-70BLI	ISSI	获取价格	Pseudo Static RAM, 4MX16, 70ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MO-207, TFBGA-48

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