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IS61LPS25636A-200TQ2LI

更新时间： 2024-11-13 13:08:55

品牌	Logo	应用领域
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32页	209K
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IS61LPS25636A-200TQ2LI 数据手册

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IS61VPS25636A IS61LPS25636A

IS61VPS51218A IS61LPS51218A

ISSI

256K x 36, 512K x 18

MAY 2005

9 Mb SYNCHRONOUS PIPELINED,

SINGLE CYCLE DESELECT STATIC RAM

DESCRIPTION

FEATURES

The ISSI IS61LPS/VPS25636A and IS61LPS/

VPS51218Aarehigh-speed,low-powersynchronousstatic

RAMsdesignedtoprovideburstable,high-performancememory

for communication and networking applications. The

IS61LPS/VPS25636A is organized as 262,144 words by

36 bits and the IS61LPS/VPS51218A is organized as

524,288 words by 18 bits. Fabricated with ISSI's ad-

vanced CMOS technology, the device integrates a 2-bit

burst counter, high-speed SRAM core, and high-drive

capability outputs into a single monolithic circuit. All

synchronous inputs pass through registers controlled by

a positive-edge-triggered single clock input.

• Internal self-timed write cycle

• Individual Byte Write Control and Global Write

• Clock controlled, registered address, data and

control

• Burst sequence control using MODE input

• Three chip enable option for simple depth

expansion and address pipelining

• Common data inputs and data outputs

• Auto Power-down during deselect

• Single cycle deselect

Write cycles are internally self-timed and are initiated by

therisingedgeoftheclockinput. Writecyclescanbeone

tofourbyteswideascontrolledbythewritecontrolinputs.

• Snooze MODE for reduced-power standby

• JTAG Boundary Scan for PBGA package

• Power Supply

Separatebyteenablesallowindividualbytestobewritten.

The byte write operation is performed by using the byte

write enable (BWE) input combined with one or more

individual byte write signals (BWx). In addition, Global

Write (GW) is available for writing all bytes at one time,

regardless of the byte write controls.

LPS: V^DD3.3V + 5%, VDDQ 3.3V/2.5V + 5%

VPS: V^DD2.5V + 5%, VDDQ 2.5V + 5%

Bursts can be initiated with either ADSP (Address Status

Processor) or ADSC (Address Status Cache Controller)

inputpins.Subsequentburstaddressescanbegenerated

internally and controlled by the ADV (burst address

advance) input pin.

• JEDEC 100-Pin TQFP, 119-ball PBGA, and

165-ball PBGA packages

• Lead-free available

The mode pin is used to select the burst sequence order,

Linear burst is achieved when this pin is tied LOW.

Interleave burst is achieved when this pin is tied HIGH or

left floating.

FAST ACCESS TIME

Symbol

tKQ

Parameter

250

2.6

200

3.1

Units

Clock Access Time

Cycle Time

tKC

Frequency

250

200

MHz

Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability

arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany

publishedinformationandbeforeplacingordersforproducts.

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. A

04/29/05

12 3 4 5 6 7...32

中文翻译

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IS61LPS25636A-200TQ2LI 替代型号

型号	品牌	替代类型	描述	数据表
IS61LPS25636A-200TQ2I	ISSI	完全替代	256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM

与IS61LPS25636A-200TQ2LI相关器件

型号	品牌	获取价格	描述	数据表
IS61LPS25636A-200TQ2LI-TR	ISSI	获取价格	IC SRAM 9M PARALLEL 100TQFP
IS61LPS25636A-200TQI	ISSI	获取价格	256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS25636A-200TQI-TR	ISSI	获取价格	256KX36 CACHE SRAM, 3.1ns, PQFP100, TQFP-100
IS61LPS25636A-200TQLI	ISSI	获取价格	256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS25636A-200TQLI-TR	ISSI	获取价格	IC SRAM 9M PARALLEL 100TQFP
IS61LPS25636A-250B2	ISSI	获取价格	256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS25636A-250B2I	ISSI	获取价格	256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS25636A-250B3	ISSI	获取价格	256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS25636A-250B3I	ISSI	获取价格	256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS25636A-250TQ	ISSI	获取价格	256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM

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