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IS61LPS25636B-200TQLI PDF预览

IS61LPS25636B-200TQLI

更新时间： 2024-11-13 19:29:59
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器内存集成电路
页数 文件大小 规格书
34页 965K
描述
Cache SRAM, 256KX36, 3.1ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, LQFP-100

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IS61LPS25636B-200TQLI 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：LQFP,Reach Compliance Code：compliant
HTS代码：8542.32.00.41Factory Lead Time：10 weeks
风险等级：2.25最长访问时间：3.1 ns
JESD-30 代码：R-PQFP-G100长度：20 mm
内存密度：9437184 bit内存集成电路类型：CACHE SRAM
内存宽度：36功能数量：1
端子数量：100字数：262144 words
字数代码：256000工作模式：SYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：256KX36封装主体材料：PLASTIC/EPOXY
封装代码：LQFP封装形状：RECTANGULAR
封装形式：FLATPACK, LOW PROFILE并行/串行：PARALLEL
峰值回流温度（摄氏度）：NOT SPECIFIED座面最大高度：1.6 mm
最大供电电压 (Vsup)：3.465 V最小供电电压 (Vsup)：3.135 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.65 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：14 mmBase Number Matches：1

IS61LPS25636B-200TQLI 数据手册

 浏览型号IS61LPS25636B-200TQLI的Datasheet PDF文件第2页浏览型号IS61LPS25636B-200TQLI的Datasheet PDF文件第3页浏览型号IS61LPS25636B-200TQLI的Datasheet PDF文件第4页浏览型号IS61LPS25636B-200TQLI的Datasheet PDF文件第5页浏览型号IS61LPS25636B-200TQLI的Datasheet PDF文件第6页浏览型号IS61LPS25636B-200TQLI的Datasheet PDF文件第7页 
IS61LPS51218B, IS61LPS25636B, IS61LPS25632B, IS64LPS25636B,  
IS61VPS/VVPS51218B, IS61VPS/VVPS25636B  
256K x 36, 256K x 32, 512K x 18  
9 Mb SYNCHRONOUS PIPELINED,  
SINgLE CYCLE DESELECT STATIC RAM  
MAY 2017  
FEATURES  
DESCRIPTION  
Theꢀ9Mbꢀproductꢀfamilyꢀfeaturesꢀ high-speed,ꢀlow-powerꢀ  
synchronousꢀstaticꢀRAMsꢀdesignedꢀtoꢀprovideꢀburstable,ꢀ  
high-performanceꢀ memoryꢀ forꢀ communicationꢀ andꢀ net-  
workingꢀ applications.ꢀ Theꢀ IS61LPS/VPS25636Bꢀ andꢀ  
IS64LPS25636Bꢀ areꢀ organizedꢀ asꢀ 262,144ꢀ wordsꢀ byꢀ  
36ꢀbits.ꢀꢀTheꢀIS61LPS25632Bꢀisꢀorganizedꢀasꢀ262,144ꢀ  
wordsꢀbyꢀ32ꢀbits.ꢀTheꢀIS61LPS/VPS51218Bꢀisꢀorganizedꢀ  
asꢀ524,288ꢀwordsꢀbyꢀ18ꢀbits.ꢀFabricatedꢀwithꢀISSI'sꢀad-  
vancedꢀCMOSꢀtechnology,ꢀtheꢀdeviceꢀintegratesꢀaꢀ2-bitꢀ  
burstꢀcounter,ꢀhigh-speedꢀSRAMꢀcore,ꢀandꢀhigh-driveꢀ  
capabilityꢀ outputsꢀ intoꢀ aꢀ singleꢀ monolithicꢀ circuit.ꢀ Allꢀ  
synchronousꢀinputsꢀpassꢀthroughꢀregistersꢀcontrolledꢀbyꢀ  
aꢀpositive-edge-triggeredꢀsingleꢀclockꢀinput.  
•ꢀ Internalꢀself-timedꢀwriteꢀcycle  
•ꢀ IndividualꢀByteꢀWriteꢀControlꢀandꢀGlobalꢀWrite  
•ꢀ Clockꢀcontrolled,ꢀregisteredꢀaddress,ꢀdataꢀandꢀ  
control  
•ꢀ BurstꢀsequenceꢀcontrolꢀusingꢀMODEꢀinputꢀꢀ  
•ꢀ Threeꢀchipꢀenableꢀoptionꢀforꢀsimpleꢀdepthꢀex-  
pansionꢀandꢀaddressꢀpipelining  
•ꢀ Commonꢀdataꢀinputsꢀandꢀdataꢀoutputs  
•ꢀ AutoꢀPower-downꢀduringꢀdeselect  
•ꢀ Singleꢀcycleꢀdeselect  
Writeꢀcyclesꢀareꢀinternallyꢀself-timedꢀandꢀareꢀinitiatedꢀbyꢀ  
theꢀrisingꢀedgeꢀofꢀtheꢀclockꢀinput.ꢀWriteꢀcyclesꢀcanꢀbeꢀ  
oneꢀtoꢀfourꢀbytesꢀwideꢀasꢀcontrolledꢀbyꢀtheꢀwriteꢀcontrolꢀ  
inputs.  
•ꢀ SnoozeꢀMODEꢀforꢀreduced-powerꢀstandby  
•ꢀ JTAGꢀBoundaryꢀScanꢀforꢀBGAꢀpackage  
•ꢀ PowerꢀSupply  
Separateꢀbyteꢀenablesꢀallowꢀindividualꢀbytesꢀtoꢀbeꢀwritten.ꢀ  
Theꢀbyteꢀwriteꢀoperationꢀisꢀperformedꢀbyꢀusingꢀtheꢀbyteꢀ  
writeꢀenableꢀ(BWE)ꢀinputꢀcombinedꢀwithꢀoneꢀorꢀmoreꢀ  
individualꢀbyteꢀwriteꢀsignalsꢀ(BWx). Inꢀaddition,ꢀGlobalꢀ  
Writeꢀ(GW)ꢀisꢀavailableꢀforꢀwritingꢀallꢀbytesꢀatꢀoneꢀtime,ꢀ  
regardlessꢀofꢀtheꢀbyteꢀwriteꢀcontrols.  
ꢀ LPS:ꢀVdd 3.3V (+ 5%), Vddq 3.3V/2.5V (+ 5%)  
VPS:ꢀVdd 2.5V (+ 5%), Vddq 2.5V (+ 5%)  
VVPS:ꢀVdd 1.8V (+ 5%), Vddq 1.8V (+ 5%)  
•ꢀ JEDECꢀ100-PinꢀQFP,ꢀ119-ballꢀBGA,ꢀandꢀ165-  
ballꢀBGAꢀpackages  
BurstsꢀcanꢀbeꢀinitiatedꢀwithꢀeitherꢀADSPꢀ(AddressꢀStatusꢀ  
Processor)ꢀorꢀADSCꢀ(AddressꢀStatusꢀCacheꢀController)ꢀ  
inputꢀpins.ꢀSubsequentꢀburstꢀaddressesꢀcanꢀbeꢀgener-  
atedꢀinternallyꢀandꢀcontrolledꢀbyꢀtheꢀADVꢀ(burstꢀaddressꢀ  
advance)ꢀinputꢀpin.ꢀ  
•ꢀ Lead-freeꢀavailable  
Theꢀmodeꢀpinꢀisꢀusedꢀtoꢀselectꢀtheꢀburstꢀsequenceꢀor-  
der,ꢀLinearꢀburstꢀisꢀachievedꢀwhenꢀthisꢀpinꢀisꢀtiedꢀLOW.ꢀ  
InterleaveꢀburstꢀisꢀachievedꢀwhenꢀthisꢀpinꢀisꢀtiedꢀHIGHꢀ  
orꢀleftꢀfloating.  
FAST ACCESS TIME  
Symbol  
Parameter  
250  
2.6ꢀ  
4ꢀ  
200  
3.1ꢀ  
5ꢀ  
166  
3.8ꢀ  
6ꢀ  
Units  
ns  
ꢀ
ꢀ
ꢀ
tkq  
tkc  
ꢀ
ClockꢀAccessꢀTimeꢀ  
CycleꢀTimeꢀ  
ns  
Frequencyꢀ  
250ꢀ  
200ꢀ  
166ꢀ  
MHz  
Copyright © 2017 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no  
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on  
any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause  
failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written  
assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
1
Rev. B3  
05/26/2017  
1234567...34

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与IS61LPS25636B-200TQLI相关器件

型号 品牌 获取价格 描述 数据表
IS61LPS25636D-133TQI ISSI

获取价格

 		Cache SRAM, 256KX36, 4ns, CMOS, PQFP100, TQFP-100
IS61LPS25636D-166B ISSI

获取价格

 		Cache SRAM, 256KX36, 3.5ns, CMOS, PBGA119, PLASTIC, BGA-119
IS61LPS25636D-166BI ISSI

获取价格

 		Cache SRAM, 256KX36, 3.5ns, CMOS, PBGA119, PLASTIC, BGA-119
IS61LPS25636D-166TQI ISSI

获取价格

 		Cache SRAM, 256KX36, 3.5ns, CMOS, PQFP100, TQFP-100
IS61LPS25636D-200BI ISSI

获取价格

 		Cache SRAM, 256KX36, 3.1ns, CMOS, PBGA119, PLASTIC, BGA-119
IS61LPS25636D-200TQI ISSI

获取价格

 		Cache SRAM, 256KX36, 3.1ns, CMOS, PQFP100, TQFP-100
IS61LPS25636D-225TQI ISSI

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 		Cache SRAM, 256KX36, 2.8ns, CMOS, PQFP100, TQFP-100
IS61LPS25636D-250B ISSI

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 		Cache SRAM, 256KX36, 2.6ns, CMOS, PBGA119, PLASTIC, BGA-119
IS61LPS25636D-250TQ ISSI

获取价格

 		Cache SRAM, 256KX36, 2.6ns, CMOS, PQFP100, TQFP-100
IS61LPS25636D-5TQ ISSI

获取价格

 		Cache SRAM, 256KX36, 5ns, CMOS, PQFP100, TQFP-100

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