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IS46R32400E-6BLA1 PDF预览

IS46R32400E-6BLA1

更新时间: 2024-11-23 19:58:27
品牌 Logo 应用领域
美国芯成 - ISSI 时钟动态存储器双倍数据速率内存集成电路
页数 文件大小 规格书
31页 1347K
描述
DDR DRAM, 4MX32, 0.7ns, CMOS, PBGA144, 12 X 12 MM, 0.80 MM PITCH, LEAD FREE, MO-205, FBGA-144

IS46R32400E-6BLA1 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:LFBGA, BGA144,12X12,32Reach Compliance Code:compliant
风险等级:5.74访问模式:FOUR BANK PAGE BURST
最长访问时间:0.7 ns其他特性:AUTO/SELF REFRESH
最大时钟频率 (fCLK):167 MHzI/O 类型:COMMON
交错的突发长度:2,4,8JESD-30 代码:S-PBGA-B144
长度:12 mm内存密度:134217728 bit
内存集成电路类型:DDR DRAM内存宽度:32
功能数量:1端口数量:1
端子数量:144字数:4194304 words
字数代码:4000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:4MX32输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA144,12X12,32封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH电源:2.5 V
认证状态:Not Qualified刷新周期:4096
筛选级别:AEC-Q100座面最大高度:1.4 mm
自我刷新:YES连续突发长度:2,4,8
最大待机电流:0.005 A子类别:DRAMs
最大压摆率:0.3 mA最大供电电压 (Vsup):2.7 V
最小供电电压 (Vsup):2.3 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
宽度:12 mmBase Number Matches:1

IS46R32400E-6BLA1 数据手册

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IS43/46R16800E, IS43/46R32400E  
JANUARY 2014  
4Mx32, 8Mx16  
128Mb DDR SDRAM  
FEATURES  
DEVICE OVERVIEW  
•ꢀ VDDꢀandꢀVDDQ:ꢀ2.5Vꢀ±ꢀ0.2Vꢀ(-5,-6)  
•ꢀ VDDꢀandꢀVDDQ:ꢀ2.5Vꢀ±ꢀ0.1Vꢀ(-4)  
•ꢀ SSTL_2ꢀcompatibleꢀI/O  
ISSI’sꢀ128-MbitꢀDDRꢀSDRAMꢀachievesꢀhighꢀspeedꢀdataꢀ  
transfer using pipeline architecture and two data word  
accessesꢀperꢀclockꢀcycle.ꢀTheꢀ134,217,728-bitꢀmemoryꢀ  
arrayꢀisꢀinternallyꢀorganizedꢀasꢀfourꢀbanksꢀofꢀ32Mbꢀtoꢀ  
allowꢀconcurrentꢀoperations.ꢀTheꢀpipelineꢀallowsꢀReadꢀ  
and Write burst accesses to be virtually continuous, with  
theꢀoptionꢀtoꢀconcatenateꢀorꢀtruncateꢀtheꢀbursts.ꢀTheꢀ  
programmable features of burst length, burst sequence  
andꢀCASꢀlatencyꢀenableꢀfurtherꢀadvantages.ꢀTheꢀdeviceꢀ  
isꢀavailableꢀinꢀ16-bitꢀandꢀ32-bitꢀdataꢀwordꢀsizeꢀInputꢀ  
dataꢀisꢀregisteredꢀonꢀtheꢀI/Oꢀpinsꢀonꢀbothꢀedgesꢀofꢀ  
DataꢀStrobeꢀsignal(s),ꢀwhileꢀoutputꢀdataꢀisꢀreferencedꢀ  
toꢀbothꢀedgesꢀofꢀDataꢀStrobeꢀandꢀbothꢀedgesꢀofꢀCLK.ꢀ  
CommandsꢀareꢀregisteredꢀonꢀtheꢀpositiveꢀedgesꢀofꢀCLK.ꢀ  
•ꢀ Double-dataꢀrateꢀarchitecture;ꢀtwoꢀdataꢀtransfersꢀ  
per clock cycle  
•ꢀ Bidirectional,ꢀdataꢀstrobeꢀ(DQS)ꢀisꢀtransmitted/  
received with data, to be used in capturing data  
at the receiver  
•ꢀ DQSꢀisꢀedge-alignedꢀwithꢀdataꢀforꢀREADsꢀandꢀ  
centre-alignedꢀwithꢀdataꢀforꢀWRITEs  
•ꢀ Differentialꢀclockꢀinputsꢀ(CKꢀandꢀCK)  
•ꢀ DLLꢀalignsꢀDQꢀandꢀDQSꢀtransitionsꢀwithꢀCKꢀ  
transitions  
•ꢀ CommandsꢀenteredꢀonꢀeachꢀpositiveꢀCKꢀedge;ꢀdataꢀ  
andꢀdataꢀmaskꢀreferencedꢀtoꢀbothꢀedgesꢀofꢀDQS  
AnꢀAutoꢀRefreshꢀmodeꢀisꢀprovided,ꢀalongꢀwithꢀaꢀSelfꢀ  
Refreshꢀmode.ꢀAllꢀI/OsꢀareꢀSSTL_2ꢀcompatible.  
•ꢀ Fourꢀinternalꢀbanksꢀforꢀconcurrentꢀoperation  
ADDRESS TABLE  
•ꢀ DataꢀMaskꢀforꢀwriteꢀdata.ꢀDMꢀmasksꢀwriteꢀdataꢀ  
Parameter  
4M x 32  
8M x 16  
at both rising and falling edges of data strobe  
Configuration  
1Mꢀxꢀ32ꢀxꢀ4ꢀ  
2Mꢀxꢀ16ꢀxꢀ4ꢀ  
banks  
•ꢀ BurstꢀLength:ꢀ2,ꢀ4ꢀandꢀ8  
banks  
•ꢀ BurstꢀType:ꢀSequentialꢀandꢀInterleaveꢀmode  
•ꢀ ProgrammableꢀCASꢀlatency:ꢀ2,ꢀ2.5,ꢀ3,ꢀandꢀ4  
•ꢀ AutoꢀRefreshꢀandꢀSelfꢀRefreshꢀModes  
•ꢀ AutoꢀPrecharge  
BankꢀAddressꢀ BA0,ꢀBA1  
Pins  
BA0,ꢀBA1  
Autoprecharge A8/AP  
Pins  
A10/AP  
•ꢀ TrasꢀLockoutꢀsupportedꢀ(trap = trcd)  
RowꢀAddress  
4K(A0ꢀ–ꢀA11)  
4K(A0ꢀ–ꢀA11)  
512(A0ꢀ–ꢀA8)  
Column  
Address  
256(A0ꢀ–ꢀA7)  
OPTIONS  
•ꢀ Configuration(s):ꢀ4Mx32,ꢀ8Mx16  
RefreshꢀCount  
Com./Ind./A1  
A2  
•ꢀ Package(s):ꢀ  
ꢀ 144ꢀBallꢀBGAꢀ(x32)  
66-pinꢀTSOP-IIꢀ(x16)ꢀandꢀ60ꢀBallꢀBGAꢀ(x16)  
•ꢀ Lead-freeꢀpackageꢀavailable  
•ꢀ TemperatureꢀRange:ꢀ  
4Kꢀ/ꢀ64ms  
4Kꢀ/ꢀ16ms  
4Kꢀ/ꢀ64ms  
4Kꢀ/ꢀ16ms  
KEY TIMING PARAMETERS  
SpeedꢀGrade  
-4  
-5  
-6  
Units  
MHz  
MHz  
MHz  
MHz  
ꢀ Commercialꢀ(0°Cꢀtoꢀ+70°C)  
FckꢀMaxꢀCLꢀ=ꢀ4  
FckꢀMaxꢀCLꢀ=ꢀ3  
FckꢀMaxꢀCLꢀ=ꢀ2.5  
FckꢀMaxꢀCLꢀ=ꢀ2  
250  
200  
ꢀ Industrialꢀ(-40°Cꢀtoꢀ+85°C)  
Automotive,ꢀA1ꢀ(-40°Cꢀtoꢀ+85°C)  
Automotive,ꢀA2ꢀ(-40°Cꢀtoꢀ+105°C)  
200  
167  
133  
167  
167  
133  
Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without  
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest  
version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-  
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications  
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
Integrated Silicon Solution, Inc.  
1
Rev. C  
1/16/14  

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